CONTROLS HARDWARE RELEASE NO. 48.0CONTROLS
CAMAC 180
DIGITAL I/O
ED-35359
CONTROLS HARDWARE RELEASE NO. 48.0
CAMAC 180 Module
Digital Input/Output
Robert J. Ducar
December 9, 1985
1 DESCRIPTION
2 CAMAC 180 OP CODES
5 SPARES
6 DOCUMENTATION
7 PALS DOCUMENTATION
1 DESCRIPTION
The one-wide CAMAC 180 module provides basic digital
input and output control facilities. With the addition of
external multiplexing hardware, the 180 module can provide
up to 256 bits of digital monitoring - organized as sixteen
16 bit words. The 180 module also provides twelve control
lines. Inputs and outputs are active high and TTL
compatible.
External monitor data multiplexing is achieved by the
decoding of four mux address lines that are sourced from the
180 module. These lines increment every ten microseconds
and request the indicated monitor word to be presented at
the monitor input of the module. The presented monitor data
are latched into on-board cache memory approximately eight
microseconds after the mux address lines change state.
Monitor data are thus refreshed every 160 microseconds. A
front panel led, "UA", indicates that the monitor update
process is active.
The twelve control lines are normally static high or low
outputs. A two microsecond strobe pulse is always issued
when the control bit register is overwritten. When the "P"
bit is asserted, all addressed output lines will pulse high
for two microseconds as the control bit register is
overwritten. The pulsed feature is rarely used.
The control, strobe, and mux address lines are sourced by
74128 drivers and may be terminated in 100 ohms. The
monitor line inputs are terminated with 1000 ohms to ground.
Upon clear command or powering-up, all control lines are set
low.
This module will assert LAM if the monitor word
multiplexing process is not active. Provision has also been
made to assert LAM when any bit of the upper and/or lower
byte of Monitor Word 0 is not asserted. This feature is
activated by insertion of 74LS30 chips at IC locations #52
and/or #53. Said LAM functionality is implemented only for
the Tevatron Power Supply Controller interface at this time.
2 CAMAC 180 OP CODES
All codes return module Q and X immediately.
This module may assert LAM.
F(0) A(n) Read Monitor Word n (n = 0 to 15)
---------
R16 - R1
-----------------------------------
M15 (MSB) - Monitor Data - (LSB) M0
F(1) A(0) Read Status and Control Bit Register
---------
R16 | R15 | R14 | R13 | R12 - R1
----------------------------------
| P | LAM | UA | 0 | C11 - C0 |
P: When asserted, P indicates that the last
overwrite of the control bit register
was pulse mode.
LAM: When asserted, indicates UA is false.
May also indicate that any bit of the
upper and/or lower byte of Monitor Word
0 is not asserted.
UA: Update Active. Assertion indicates
the monitor update process is active.
F(4) A(0) Read Monitor Word n (n = 0 to 15)
--------- Auto Increment Mode
R16 - R1
-----------------------------------
M15 (MSB) - Monitor Data - (LSB) M0
Read pointer n is set to zero by the
F(1) A(0) command and incremented by 1
after each F(4) A(0) command.
F(6) A(0) Read Module Number
---------
R16 - R9 | R8 - R1
-----------------------------
| 0 | B4 Hex, 180 Dec |
F(9) A(0) Reset Module
---------
This command is a logical or with
Z*S2 and power-up clear. It resets
the control outputs to zero.
F(17) A(0) Write P and Control Bit Register
----------
W16 | W15-W13 | W12 - W1
----------------------------
| P | X | C11 - C0 |
P=0: All Control Bits static 0 or 1.
P=1: Control Bit output pulses for
2 microseconds if set.
3 CAMAC 180 MODULE - I/O ASSIGNMENTS
Rear I/O: 36 Position Edge Connector A = R B = L
POS SIGNAL POS SIGNAL
--- -------------- --- ----------------
1L M15 (MSB) 1R M14
2L M13 2R M12
3L M11 3R M10
4L M9 4R M8
5L M7 5R M6
6L M5 6R M4
7L M3 7R M2
8L M1 8R M0 (LSB)
9L C11 9R C10
10L C9 10R C8
11L C7 11R C6
12L C5 12R C4
13L C3 13R C2
14L C1 14R C0
15L MA8 15R MA4
16L MA2 16R MA1
17L BP /AIP 17R STROBE (2 usec)
18L Common 18R Common
The BP /AIP output reflects the state of the P1 line of
the CAMAC dataway connector. In Tevatron crates, this line
generally indicates the state of the Tevatron Abort Link.
BP (active high) signifies Beam Permit. /AIP (active low)
signifies Abort In Progress. This line is driven by a 74128
driver and may be terminated in 100 ohms.
4 CAMAC 180 MODULE - FRONT PANEL
The CAMAC 180 module has the following front
panel features:
N led: Red (stretched)
LAM led: Red
UA led: Green (stretched), Indicates monitor
update process is active.
5 SPARES
A supply of CAMAC 180 operational spares is maintained on
the second floor of the Linac Annex. Upon replacement be
sure to check the optional installation of 74LS30 ICs at
locations #52 and #53.
6 DOCUMENTATION
0812-ED-35359 Schematic
0812-BD-35360 Artwork
0812-BD-35361 Master Drawing
0812-MD-34863 Outline Drawing
0812-MC-35522 Front Panel Mechanical
0812-MC-35523 Front Panel Silkscreen
7 PALS DOCUMENTATION
Directory: DEVL::USR$DISK3:[DUCAR.PALS]
Filenames: 18051A.DAT Camac 180 RF-102B
rjd: DEVL::USR$DISK3:[DUCAR.DOC]CMC180.RNO
