BEAM SYNC CLOCKS
CAMAC 279 Modules
Detailed Listing of Implemented Versions

R. Crouch/G. Vogel
March 11, 2015

279 MODULE DIRECTORY

All Versions

Version 1.0: TEST

Channel 0

This channel is armed by an external trigger and outputs a pulse with reference to BSCLK event $AA.

Channel 1

This channel is armed by an external trigger and outputs a pulse with reference to BSCLK event $AA.

Module Location

Lab Test Stand

Unique PAL(s)

27937A.ABL , 27941A.ABL , 27942A.ABL

TDCE

$07 (720 Hz)

BSDCE

$AA + $55

Notes

A normal testing environment is one in which both TCLK and BSCLK are applied. The TDCE output should be wired to Ext Trig 0 and 1 inputs.

Version 2.2: xxBS Currently a SPARE! 11-23-92

Channel 0

This channel, which is always armed, generates pulses delayed from MIBS event $AA. The delay setting for this channel may range from 0 to 157 clock ticks (1 turn max). C:735MS0 is the currently assigned name for this delay channel.

Channel 1

This channel is similar to Channel 0. C:735MS1 is the currently assigned name for this delay channel.

Module Location

$2C N18 (Tevatron) - Former Location

Unique Pals

27941B.ABL , 27942C.ABL

TDCE

none

BSDCE

$77

Notes

It is not necessary to connect TCLK to this module. There is presently no requirement for a PAL at location 37. The TCLK decoder at location 32 should be removed.

Version 2.3: Muon septa triggers

Channel 0

This channel is armed by TCLK Events $9A,$9B,$9C & $9D and outputs a pulse with reference to RRBS event $A6.

Channel 1

This channel is armed by TCLK Events $9E,$96,$97 & $98 and outputs a pulse with reference to RRBS event $A6.

Module Location

MUON $37 N12
MUON $50 N2
MUON $72 N3
MUON $72 N4

Unique PAL(s)

27937A1.ABL , 27941A8.ABL , 27942A1.ABL

TDCE

$9A,$9B,$9C,$9D,$9E,$96,$97 & $98

BSDCE

$A6

Notes

It is necessary to connect TCLK to this module. 57-1,2,4 and 5 are pulled-up to allow delays longer than a single turn for both channels. The 100 ohm resistors in this area should be removed. Channel 0 and channel 1 are wire-ored on the paddle board.

Version 2.4: Muon septa, PMAG, Lens triggers

Channel 0

This channel is armed by an external trigger provided by a 377 timer channel and outputs a pulse with reference to RRBS event $A6.

Channel 1

This channel is armed by an external trigger provided by a 377 timer channel and outputs a pulse with reference to RRBS event $A6.

Module Location

MUON $37 N12
MUON $50 N2
MUON $72 N3
MUON $72 N4

Unique PAL(s)

27937A.ABL , 27941A8.ABL , 27942A1.ABL

TDCE

$07

BSDCE

$A6

Notes

It is not necessary to connect TCLK to this module. 57-1,2,4 and 5 are pulled-up to allow delays longer than a single turn for both channels. The 100 ohm resistors in this area should be removed. Channel 0 and channel 1 are wire-ored on the paddle board.

Version 3.0 MIBS 120 GeV Proton Extraction (Chan 0) 150 GeV P-Bar Extraction (Chan 1)

Channel 0

This channel fires the E17K1 Kicker as part of the process of extracting 120 GeV beam from the Main Ring to the P-Bar target. This channel is always armed and outputs a pulse delayed from MIBS event $79. Parameter M:TE17E1 is assigned to the delay value. This channel is normally operative during a Main Ring cycle marked by TCLK event $29. Kicker E17K2 fires in concert with the E17K1 kicker to achieve the desired extraction (ref. Version 7.1).

Channel 1

This channel fires the E17K3 kicker as part of the process of transferring 150 GeV P-Bars from the Main Ring to the Tevatron. This channel is always armed and outputs a pulse delayed from MIBS event $7B. Parameter M:TE17E3 is assigned to the delay value. This channel is normally operative during a Main Ring cycle marked by TCLK event $2A. This channel output is wire-ored to another 279 output. See the note below.

Module Location

$E5 N19 (Tevatron)

Unique Pals

27941C.ABL , 27942C.ABL

TDCE

none

BSDCE

$79 + $7B

Notes

The PAL at location 37 is omitted. It is not necessary to connect TCLK to this module. The Channel 1 output of this module is wire-ored to the Channel 1 output of the 279 module [V22.1] which resides in $E5 N20. This will accommodate testing of the MI to Tev P-Bar injection line with 150 GeV protons from the Tevatron.

Version 3.1 MIBS 3-24-99

Channel 0

I:BP1EX2 (MIBS $79)

Channel 1

I:BP1EX3 (MIBS $78)

Module Location

$62 N18 (Main Injector)

Unique Pals

27941C.ABL , 27942C.ABL

TDCE

none

BSDCE

$79 + $78

Notes

The PAL at location 37 is omitted. It is not necessary to connect TCLK to this module. PAL 27941C was modified to decode MIBS $78 instead of MIBS $7B. The outputs for Channels 0 and 1 will normally be connected together at the I/O connector and ored with the ored outputs of the C279 module [V4.2] which resides in $62 N19. This will accommodate P1 BPM sample times.

Version 4.2 MIBS

Channel 0

This channel will fire the F14 kicker when 8 Gev protons are being transferred from the Main Ring to the Debuncher or Accumulator. The accelerator resets for this operation are TCLK events $14 or $16 respectively for the Booster and TCLK event $2D for the Main Ring. This channel will output a pulse delayed from MIBS event $7D or $7E. Parameter M:TF14KX is assigned to the delay value.

Channel 1

This channel will fire the F14 kicker when P-Bars are transferred from the Accumulator to the Main Ring. The accelerator resets for this operation are TCLK events $91, $9A, $9B, and $9C for the Accumulator and TCLK event $2A for the Main Ring. This channel is always armed and outputs a pulse delayed from MIBS event $7A. Parameter M:TF14KI is assigned to the delay value.

Module Location

$F9 N14 (Tevatron)

Unique Pals

27941BB.ABL , 27942D.ABL

TDCE

none

BSDCE

$7A + $7D + $7E

Notes

The outputs for Channels 0 and 1 will normally be connected together as they exit the rack top entry panel.

Version 4.3 MIBS 3-24-99

Channel 0

I:BP1EXT (MIBS $7D or $7E)

Channel 1

I:BP1EX1 (MIBS $7A)

Module Location

$62 N19 (Main Injector)

Unique Pals

27941ZZ.ABL , 27942D.ABL

TDCE

none

BSDCE

$7A + $7D + $7E

Notes

It is not necessary to connect TCLK to this module. The outputs for Channels 0 and 1 will normally be connected together at the I/O connector and ored with the ored outputs of the C279 (Ver. 3.1) at $62 N18.

Version 4.4 MIBS 6-13-00

Channel 0

I:BP1EX4 (MIBS $D6)

Channel 1

I:BP1EX5 (MIBS $7A)

Module Location

$62 N19 (Main Injector)

Unique Pals

27941A1.ABL , 27942D.ABL

TDCE

none

BSDCE

$D6 + $7A

Notes

It is not necessary to connect TCLK to this module. The outputs for Channels 0 and 1 will normally be connected together at the I/O connector and ored with the ored outputs of the C279 (Ver. 3.1) at $62 N18 and N19

Version 4.5 MIBS 6-14-00

Channel 0

I:BA1EX0 (MIBS $D8)

Channel 1

I:BA1EX1 (MIBS $7B)

Module Location

$62 N19 (Main Injector)

Unique Pals

27941A2.ABL , 27942D.ABL

TDCE

none

BSDCE

$D8 + $7B

Notes

It is not necessary to connect TCLK to this module. The outputs for Channels 0 and 1 will normally be connected together at the I/O connector.

Version 5.1 MIBS

Channel 0

This channel is always armed and outputs a pulse delayed from MIBS event $78 which normally accompanies transfer of protons from the Main Ring to Tevatron in fixed- target operations. The delay setting is as per M:E0DT78. The Channel 0 output is wire-ored to three other 279 outputs.

Channel 1

This channel is always armed and outputs a pulse delayed from MIBS event $7C which normally accompanies transfer of protons from the Main Ring to Tevatron in colliding physics operations. The delay setting is as per M:E0DT7C. The Channel 1 output is wire-ored to three other 279 outputs.

Module Location

$1E N21 (Tevatron)

Unique Pals

27941R.ABL , 27942D.ABL

TDCE

none

BSDCE

$78 + $7C

Notes

It is not necessary to connect TCLK to this module. There is no need to install chips at locations 9, 10, 16, 26, 32, and 37. Channels 0 and 1 of this module are wire-ored to Channel 1 of the 279 module at $1E N18 and to Channel 0 of the 279 module at $1E N20.

Version 6.0 MIBS

Channel 0

This channel is always armed and outputs a pulse delayed from MIBS event $79. Parameter M:BPMISH is assigned to the delay value. This channel is wire-ored to the Channel 1 output at the I/O connector. It is also wire-ored to the Channel 0 output of the 279 module at $80 N18.

Channel 1

This channel is always armed and outputs a pulse delayed from MIBS event $7A. Parameter M:BPMESH is assigned to the delay value. This channel is wire-ored to the Channel 0 output at the I/O connector. It is also wire-ored to the Channel 0 output of the 279 module at $80 N18.

Module Location

$80 N19 (P-Bar)

Unique Pals

27941F.ABL , 27942C.ABL

TDCE

none

BSDCE

$79 + $7A

Notes

The PAL at location 37 is omitted. It is not necessary to connect TCLK to this module. The 27942C.ABL PAL is a repeat from 279 [V3.0].

Version 7.1 MIBS 120 GeV Proton Extraction

Channel 0

This channel fires the E17K2 Kicker as part of the process of extracting 120 GeV beam from the Main Ring to the P-Bar target. This channel is always armed and outputs a pulse delayed from MIBS event $79. Parameter M:TE17E2 is assigned to the delay value. This channel is normally opera- tive during a Main Ring cycle marked by TCLK event $29.

Channel 1

This channel is always armed and outputs a pulse delayed from MIBS event $7B. There is no parameter assigned to the delay value. This channel is normally operative during a Main Ring cycle marked by TCLK event $2A.

Module Location

$E9 N19 (Tevatron)

Unique Pals

27941C.ABL , 27942C.ABL

TDCE

none

BSDCE

$79 + $7B

Notes

The PAL at location 37 is omitted. It is not necessary to connect TCLK to this module. This module is identical to Version 3.0.

Version 8.1 MIBS 150 GeV P-Bar Extraction from MI

Channel 0

This channel fires the D48 Kicker as part of the process of transfering individual P-Bar bunches from the Main Ring to the Tevatron. This channel is always armed and outputs a pulse delayed from MIBS event $7B. Parameter M:TD48KE is assigned to the delay value. This channel output is wire-ored to two other 279 outputs. See note below.

Channel 1

This channel is always armed and outputs a pulse delayed from MIBS event $7B which normally accompanies transfer of P-Bar bunches from the Main Ring to Tevatron in colliding physics operations. The delay setting is as per M:E0DT7B. The Channel 1 output is wire-ored to three other 279 outputs.

Module Location

$1E N18 (Tevatron)

Unique Pals

27941H.ABL , 27942D.ABL

TDCE

none

BSDCE

$7B

Notes

The PAL at location 37 is omitted. It is not necessary to connect TCLK to this module. Chips at locations 9, 10, 16, 26, 32, and 37 need not be loaded. The Channel 0 output of this module is wire-ored to the Channel 1 output of the 279 module [V14.2] resident in crate $1E N20. This will accommodate testing of the MI to Tev P-Bar injection line with protons from the Tevatron. It is also wire-ored to the Channel 0 output of the 279 module [V18.1] resedent in TEV crate $1E N15. The Channel 1 output of this module is wire-ored to Channel 0 of the 279 module at $1E N20 and Channels 0 and 1 of the 279 module at $1E N21.

Version 8.2 RRBS 8 GeV P-Bars from RR to MI 01-18-998 GeV Protons from MI to RR

Channel 0

This channel fires the MI30 and RR40 Kicker as part of the process of transferring individual proton bunches from the Main Injector to the Recycler. This channel is always armed and outputs a pulse delayed from RRBS event $A2. For the MI30 kicker, parameter I:K3AKD1 is assigned to the delay value. At MI-30, this channel output is wire-ored to five other 279 outputs. For the RR40 kicker, parameter R:K4AKD1 is assigned to the delay value. At MI-40, this channel output is wire-ored to two other 279 outputs. See note below.

Channel 1

This channel is always armed and outputs a pulse delayed from RRBS event $A7 which normally accompanies transfer of P-Bar bunches from the Recycler to Main Injector. For the MI30 kicker, parameter I:K3AKD2 is assigned to the delay value. At MI-30, this channel output is wire-ored to five other 279 outputs. For the RR40 kicker, parameter R:K4AKD2 is assigned the delay value. At MI-40, the Channel 1 output is wire-ored to two other 279 outputs. See note below.

Module Location

$30 N12 (Main Injector) $40 N15 (Main Injector)

Unique Pals

27941VV.ABL , 27942D.ABL

TDCE

$A7 RRBS

BSDCE

$A2

Notes

The PAL at location 37 is omitted. It is not necessary to connect TCLK to this module. Chips at locations 9, 10, 16, 26, 32, and 37 need not be loaded. Wire BS1 (41-15) to TDCE (37-15). At MI-30, the Channel 0 output of this module is wire-ored to the Channel 1 output of this module. These, in turn, are wire-ored to the Channel 0 and Channel 1 outputs of the 279 module [V8.3] resident in crate $30 N13, and again to the Channel 0 and Channel 1 outputs of the 279 module [V8.4] resident in crate $30 [N14] At MI-30, the Channel 1 output of this module is wire-ored to Channel 0 of this module. At MI-40, the Channel 0 output of this module is wire-ored to the Channel 1 output of this module. These, in turn, are wire-ored to the Channel 0 output of the 279 module [V12.4] resident in crate $40 N14. At MI-40, the Channel 1 output of this module is wire-ored to Channel 0 of this module.

Version 8.3 RRBS 8 GeV P-Bars from Tev (MI) to RR01-18-998 GeV P-Bars from Accumulator to RR

Channel 0

This channel fires the MI30 and RR20 Kickers as part of the process of transferring P-Bar bunches from the Main Injector to the Recycler. This is for the recycling P-Bars from Collider operation. This channel is always armed and outputs a pulse delayed from RRBS event $A0. For the MI30 kicker, parameter I:K3TDA0 is assigned to the delay value. At MI30, this channel output is wire-ored to five other 279 outputs. For the RR20 kicker, parameter R:K2TDA0 is assigned to the delay value. At MI20, this channel output is wire-ored to three other 279 outputs. See note below.

Channel 1

This channel is always armed and outputs a pulse delayed from RRBS event $A1 which normally accompanies transfer of P-Bar bunches from the Accumulator to Recycler. This is for the stacking of P-Bars in the Recycler. For the MI30 kicker, parameter I:K3TDA1 is assigned to the delay value. At MI-30, this channel output is wire-ored to five other 279 outputs. For the RR20 kicker, parameter R:K2TDA1 is assigned to the delay value. At MI-20, this channel output is wire-ored to three other 279 outputs. See note below. Module Locations: $20 N12 (Main Injector) & $30 N13 (Main Injector)

Unique Pals

27941XX.ABL , 27942D.ABL

TDCE

$A0 RRBS

BSDCE

$A1

Notes

The PAL at location 37 is omitted. It is not necessary to connect TCLK to this module. Chips at locations 9, 10, 16, 26, 32, and 37 need not be loaded. Wire BS1 (41-15) to TDCE (37-15). At MI20, the Channel 0 output of this module is wire-ored to the Channel 1 output of this module. These, in turn, are wire ored to the Channel 0 and Channel 1 outputs of the 279 module [V8.4] resident in crate $20 N13. At MI20, The Channel 1 output of this module is wire-ored to Channel 0 of this module. At MI30, the Channel 0 output of this module is wire-ored to the Channel 1 output of this module. These, in turn, are wire ored to the Channel 0 and Channel 1 outputs of the 279 module [V8.2] resident in crate $30 N12, and again to the Channel 0 and Channel 1 outputs of the 279 Module [v8.4] resident in crate $30 N14. At MI30, The Channel 1 output of this module is wire-ored to Channel 0 of this module.

Version 8.4 RRBS 8 GeV Protons from RR to MI01-18-998 GeV Protons from RR to Accumulator

Channel 0

This channel fires the MI30 and RR20 Kickers as part of the process of transferring Proton bunches from the Recycler to the Main Injector. This transfer is for tune-up of P-Bar injection into Recycler. This channel is always armed and outputs a pulse delayed from RRBS event $A3. For the MI30 kicker, parameter I:K3TDA3 is assigned to the delay value. At MI30, this channel output is wire-ored to five other 279 outputs. For the RR20 kicker, parameter R:K2TDA3 is assigned to the delay value. At MI20, this channel output is wire-ored to three other 279 outputs. See note below.

Channel 1

This channel is always armed and outputs a pulse delayed from RRBS event $A6 which normally accompanies transfer of Proton bunches from the Recycler to the Accumulator for tune- up of stacking transfers. For the MI30 kicker, parameter I:K3TDA6 is assigned to the delay value. At MI-30, this channel output is wire-ored to five other 279 outputs. For the RR20 kicker, parameter R:K2TDA6 is assigned to the delay value. At MI-20, this channel output is wire-ored to three other 279 outputs. See note below. Module Locations: $20 N13 (Main Injector) $30 N14 (Main Injector)

Unique Pals

27941YY.ABL , 27942D.ABL

TDCE

$A3 RRBS

BSDCE

$A6

Notes

The PAL at location 37 is omitted. It is not necessary to connect TCLK to this module. Chips at locations 9, 10, 16, 26, 32, and 37 need not be loaded. Wire BS1 (41-15) to TDCE (37-15). At MI20, the Channel 0 output of this module is wire-ored to the Channel 1 output of this module. These, in turn, are wire ored to the Channel 0 and Channel 1 outputs of the 279 module [V8.3] resident in crate $20 N12. At MI20, The Channel 1 output of this module is wire-ored to Channel 0 of this module. At MI30, the Channel 0 output of this module is wire-ored to the Channel 1 output of this module. These, in turn, are wire ored to the Channel 0 and Channel 1 outputs of the 279 module [V8.2] resident in crate $30 N12, and again to the Channel 0 and Channel 1 outputs of the 279 Module [v8.3] resident in crate $30 N13. At MI30, The Channel 1 output of this module is wire-ored to Channel 0 of this module.

Version 9.1 MIBS Slow Damper Notch Begin and End

Channel 0

This channel is dedicated to the generation of a pulse synchronous with the beginning of the notch in Main Ring Beam for the Slow Damper system. The channel is normally enabled and is referenced to MIBS $AA. The name assigned to this delay channel is M:SDNB.

Channel 1

This channel is dedicated to the generation of a pulse synchronous with the end of the notch in Main Ring Beam for the Slow Damper system. The channel is normally enabled and is referenced to MIBS $AA. The name assigned to this delay channel is M:SDNE.

Module Location

TEV $B1 N20

Unique Pals

27941B.ABL , 27942D.ABL

TDCE

none

BSDCE

$77

Notes

It is not necessary to connect TCLK to this module. There is no PAL at Location #37.

Version 10.1 TVBS & APTVBS 2-6-91; 12/2/99

Channel 0

This channel, which is always armed, generates pulses delayed from TVBS event $AA. The delay setting for this channel may range from 0 to 157 clock ticks (1 turn max). The channel is armed upon power up or module clear.

Channel 1

This channel is similar to Channel 0 and also references TVBS event $AA. As of this writing, no names have been assigned to any of the delay channels at MRRF. There is no assigned name for the delay channels at F4 in that the module is installed in a non- ACNET CAMAC crate.

Module Location

DEC-T $1C N1 - TVBS removed DEC-R $60 N22, $61 N22, $62 N20 - TVBS removed DEC-R $60 N23, $61 N23, $62 N21 - APTVBS F4 Service Building E778 CAMAC DEC-T $DB N1 - TVBS C:TEVSYN; C:TEVTRG (Steve Chappa)

Unique Pals

27941L.ABL , 27942D.ABL

TDCE

none

BSDCE

$D7 + $D8

Notes

It is not necessary to connect TCLK to this module. There is presently no requirement for a PAL at location 37. The TCLK decoder at location 32 should be removed.

Version 11.1 MIBS & TVBS D0 Collision Hall Diagnostic Triggers

Channel 0

This channel, which is always armed, generates pulses delayed from xxBS event $AA. The delay setting for this channel may range from 0 to 157 clock ticks (1 turn max). Names assigned for these delay channels are M:DCBST0 (N19) and T:DCBST0 (N20).

Channel 1

This channel, which is always armed, generates pulses delayed from xxBS events $AA, $BB, and $CC. The delay setting for this channel may range from 0 to approximately 51 clock ticks, or up to a third of a turn. For longer programmed delays, there is no channel output because the delay counter is reset every third of a turn. Names assigned for these delay channels are M:DCBST1 (N19) and T:DCBST1 (N20).

Module Location

TEV $9D N17 (APTVBS) TEV $9D N19 (MIBS) TEV $9D N20 (TVBS)

Unique Pals

27941Z.ABL , 27942C.ABL

TDCE

none

BSDCE

$77 ( MIBS Only )

Notes

It is not necessary to connect TCLK to this module. There is presently no requirement for a PAL at IC location 37. The TCLK decoder at location 32 should be removed. Parameter names for the APTVBS module are indeterminate at this writing.

Version 12.3 MIBS Main Injector MI40 Abort Kicker & Cln-Up 11-20-98

Channel 0

This channel, when armed, generates a single pulse delayed from MIBS event $AA. The delay setting for this channel may range from 0 to 65535 MIBS clock ticks. Currently assigned names for this delay channel are shown below. The channel is armed by the high to low transition of the BP signal that is applied to the Ext Trig 0 Input if the BP signal has been up for at least 100 milliseconds. The channel is also armed by TCLK event $2F (the Main Injector Clean-Up Pulse). Delays may range into multi-turns. Requested by Jensen.

Channel 1

This channel, when armed, generates a single pulse delayed from MIBS $7C. Currently assigned names for these delay channels are shown below. Delays may range from 0 to 65535 MIBS clock ticks. Requested by Marriner. Module Locations:Device Names:PS Thyratron MI $40CH0CH1Trigger N12I;K4APFDI;K4AKD1A N13I;K4BPFDI;K4BKD1B

Unique Pals

27921B.ABL , 27937V.ABL , 27941WW.ABL , 27942T.ABL

TDCE

$2F

BSDCE

$7C

Notes

It is absolutely necessary to connect TCLK to this module. The one-shot on the Ext Trig 0 Input is wired to fire on the falling edge of the applied signal. 10-5 and 37-14 should be wired to 9-10 rather than to 9-12. The Ext Trig 0 Input is wired to the Beam (Link) Permit output signal from the fiber optic Main Injector Abort repeater module located in the MI40 repeater chassis, slot 2. TCLK event $2F is stretched to the necessary 750 nsec by employing the DVALID pin of the TCLK decoder rather than the DECEN pin. Accordingly, wire IC #37-6 to IC #32-6 rather than to #32-8. ET1 of the PAL at location #37 is defined as an output. Pin 2 of IC #9 must be removed from the IC socket. The high side of the one-shot at IC #10 is set to time at about 100 milliseconds and fires when LP goes high. 57-4 and 5 are pulled-up to allow delays longer than a single turn for Chan 0. The 100 ohm resistor in this area should be removed. 1500 pf capacitor to ground should be installed at #41-12 (BS4) to effect a reduction in width of R0 & R1.

Version 12.4 RRBS Recycler Ring MI40 Dump Kicker 10-13-98

Channel 0

This channel, when armed, generates a single pulse delayed from RRBS event $D0. The delay setting for this channel may range from 0 to 65535 RRBS clock ticks. R:K4TDD0 is the currently assigned name for this delay channel. The channel is armed by TCLK $E7, "Dump protons on demand" and reset by TCLK $F5. Requested by Krafczyk and GPJ.

Channel 1

This channel is similar to channel except that it is always armed. This channel is named R:K4TDD1.

Module Location

$40 N14 (Main Injector)

Unique Pals

27937T.ABL , 27941UU.ABL , 27942S.ABL

TDCE

$E7

BSDCE

$D0

Notes

It is necessary to connect TCLK to this module. 57-1,2,4 and 5 are pulled-up to allow delays longer than a single turn for both channels. The 100 ohm resistors in this area should be removed. 1500 pf capacitor to ground should be installed at #41-12 (BS4) to effect a reduction in width of R0 & R1.

Version 13.2 MIBS C48 Transfer Kicker 1-27-88

Channel 0

This channel, when armed, outputs a pulse delayed from MIBS event $78 which initiates the transfer of protons that are destined for fixed-target physics from the Main Ring to the Tevatron. The channel is armed 100 microseconds after the BP/AIP signal from Tevatron CAMAC Crate $1D is asserted and if BP was asserted at the occurrence of MIBS $77. The channel is not armed when BP/AIP is false. M:C48DFT is the parameter assigned to the delay for this channel. This channel normally operates during during a Main Ring cycle marked by TCLK event $21.

Channel 1

This channel, when armed, outputs a pulse delayed from MIBS event $7C which initiates the transfer of protons that are destined for colliding physics from the Main Ring to the Tevatron. The channel is armed 100 microseconds after the BP/AIP signal from Tevatron CAMAC Crate $1D is asserted and if BP was asserted at the occurrence of MIBS $77. The channel is not armed when BP/AIP is false. M:C48DCP is the parameter assigned to the delay for this channel. This channel normally operates during during a Main Ring cycle marked by TCLK event $2B.

Module Location

$0D N19 (Tevatron)

Unique Pals

27937F.ABL , 27941E.ABL , 27942E.ABL

TDCE

$21 + $2B

BSDCE

$78 + $7C

Notes

It is not necessary to connect TCLK to this module. The channel outputs are normally wire-ored together. The one shot on External Trig 0 is set to approximately 100 microseconds. The BP/AIP signal from Crate $1D is applied to the External Trig 0 Input. BS1 is defined as MIBS $77.

Version 14.2 MIBS 150 GeV Proton Extraction from TEV 2-6-91

Channel 0

This channel, which is always armed, generates a pulse delayed from MIBS event $D8. The delay setting for this channel may range from 0 to 65535 clock ticks. T:E0DTD8 is the assigned name for this delay channel. The output is wire-ored with three other 279 module outputs.

Channel 1

This channel, which is always armed, generates a pulse to fire the D48 Kicker to facilitate proton transfer from the Tevatron to the Main Ring to test the Main Ring to Tevatron P-Bar transfer line. The channel output is wire-ored to two other 279 outputs. See note below for connection details. The channel is referenced to MIBS event $D8 and outputs a delayed pulse as per parameter T:TD48KE.

Module Location

$1E N20 (Tevatron)

Unique Pals

27941S.ABL , 27942D.ABL

TDCE

none

BSDCE

$D8

Notes

It is not necessary to connect TCLK to this module. There is presently no requirement for a PAL at IC location 37. Chips at locations 9, 10, 16, 26, 32, and 37 need not be loaded. 57-4 and 5 are pulled-up to allow delays longer than a single turn for Channel 0. This is not necessary for the current application, but no harm to leave it this way. The Channel 0 output of this module is wire-ored to the Channel 1 output of the 279 module at $1E N18 and to Channels 0 and 1 of the 279 module at $1E N21. The Channel 1 output is wire-ored to the 279 module [V8.1] Channel 0 output from crate $1E N18. This will accommodate testing of the MI to Tev P-Bar injection line with protons from the Tevatron. The Channel 1 output is also wire-ored to the 279 module [V18.1] Channel 0 output from crate $1E N15. This module is identical to Version 22.1. 2-6-91 Note: Clock input changed from TVBS to MIBS In accord with $D8 transfer.

Version 15.0 AP0 Scope Trigger RRBS

Channel 0

This channel is armed by TCLK Event $9A and outputs a pulse with reference to RRBS event $A6.

Channel 1

This channel is armed by TCLK Event $9B and outputs a pulse with reference to RRBS event $A6.

Module Location

MUON $72 N5

Unique PAL(s)

27937A2.ABL , 27941A8.ABL , 27942A1.ABL

TDCE

$9A & $9B

BSDCE

$A6

Notes

It is necessary to connect TCLK to this module. 57-1,2,4 and 5 are pulled-up to allow delays longer than a single turn for both channels. The 100 ohm resistors in this area should be removed. Channel 0 and channel 1 are wire-ored on the paddle board and with the outputs of the cards in slots 6,7 & 8.

Version 16.0 AP0 Scope Trigger RRBS

Channel 0

This channel is armed by TCLK Event $9C and outputs a pulse with reference to RRBS event $A6.

Channel 1

This channel is armed by TCLK Event $9D and outputs a pulse with reference to RRBS event $A6.

Module Location

MUON $72 N6

Unique PAL(s)

27937A3.ABL , 27941A8.ABL , 27942A1.ABL

TDCE

$9C & $9D

BSDCE

$A6

Notes

It is necessary to connect TCLK to this module. 57-1,2,4 and 5 are pulled-up to allow delays longer than a single turn for both channels. The 100 ohm resistors in this area should be removed. Channel 0 and channel 1 are wire-ored on the paddle board and with the outputs of the cards in slots 5,7 & 8.

Version 17.0 AP0 Scope Trigger RRBS

Channel 0

This channel is armed by TCLK Event $9E and outputs a pulse with reference to RRBS event $A6.

Channel 1

This channel is armed by TCLK Event $96 and outputs a pulse with reference to RRBS event $A6.

Module Location

MUON $72 N7

Unique PAL(s)

27937A4.ABL , 27941A8.ABL , 27942A1.ABL

TDCE

$9E & $96

BSDCE

$A6

Notes

It is necessary to connect TCLK to this module. 57-1,2,4 and 5 are pulled-up to allow delays longer than a single turn for both channels. The 100 ohm resistors in this area should be removed. Channel 0 and channel 1 are wire-ored on the paddle board and with the outputs of the cards in slots 5,6 & 8.

Version 18.0 AP0 Scope Trigger RRBS

Channel 0

This channel is armed by TCLK Event $97 and outputs a pulse with reference to RRBS event $A6.

Channel 1

This channel is armed by TCLK Event $98 and outputs a pulse with reference to RRBS event $A6.

Module Location

MUON $72 N8

Unique PAL(s)

27937A5.ABL , 27941A8.ABL , 27942A1.ABL

TDCE

$97 & $98

BSDCE

$A6

Notes

It is necessary to connect TCLK to this module. 57-1,2,4 and 5 are pulled-up to allow delays longer than a single turn for both channels. The 100 ohm resistors in this area should be removed. Channel 0 and channel 1 are wire-ored on the paddle board and with the outputs of the cards in slots 5,6 & 7.

Version 19.1 MIBS Currently an Unallocated Spare !

Channel 0

This channel is dedicated to the generation of MIBS event $7E which transfers beam from the Main Ring to the Accumulator to test the P-Bar transfer lines. Normal occurrence is during Booster and Main Ring cycle denoted by TCLK events $16 and $2D respectively. The channel is armed by an external timing pulse from a 177 module [M:MRAX, $84 N2 A(3) ] that is referenced to TCLK event $93. The Channel 0 output is referenced to MIBS event $AA and is delayed as per M:MBS7ED.

Channel 1

This channel is dedicated to the generation of MIBS event $7C which transfers the first bunch of colliding protons from the Main Ring to the Tevatron. Normal occurrence is during a Main Ring cycle denoted by TCLK event $2B which includes a Booster $15 cycle. The channel is armed by an external timing pulse from a 177 module [M:MRTCPX, $84 N2 A(5) ] that is processed by the module in $84 N3 to be active only after TCLK event $15. The Channel 1 output is referenced to MIBS event $AA and is delayed as per M:MBS7CA. The normal setting of this delay is expected to be the same as M:MBS7CB and M:MBS7CC. The Channel 1 output is wire-ored to two other 279 outputs.

Module Location

Unique Pals

27937D.ABL , 27941P.ABL , 27942F.ABL

TDCE

$0F

BSDCE

$7C + $7E

Notes

It is not necessary to connect TCLK to this module.

Version 20.0 MIBS Currently an Unallocated Spare !

Channel 0

This channel is dedicated to the generation of MIBS event $7C which transfers the second bunch of colliding protons from the Main Ring to the Tevatron. Normal occurrence is during a Main Ring cycle denoted by TCLK event $2B which includes a Booster $19 cycle. The channel is armed by an external timing pulse from a 177 module [M:MRTCPX, $84 N2 A(5) ] that is processed by the module in $84 N3 to be active only after TCLK event $19. The Channel 0 output is referenced to MIBS event $BB and is delayed as per M:MBS7CB. The normal setting of this delay is expected to be the same as M:MBS7CA and M:MBS7CC. The Channel 0 output is wire-ored to two other 279 outputs.

Channel 1

This channel is dedicated to the generation of MIBS event $7C which transfers the third bunch of colliding protons from the Main Ring to the Tevatron. Normal occurrence is during a Main Ring cycle denoted by TCLK event $2B which includes a Booster $1C cycle. The channel is armed by an external timing pulse from a 177 module [M:MRTCPX, $84 N2 A(5) ] that is processed by the module in $84 N3 to be active only after TCLK event $1C. The Channel 1 output is referenced to MIBS event $CC and is delayed as per M:MBS7CC. The normal setting of this delay is expected to be the same as M:MBS7CA and M:MBS7CB. The Channel 1 output is wire-ored to two other 279 outputs.

Module Location

Unique Pals

27937D.ABL , 27941Q.ABL , 27942B.ABL

TDCE

$0F

BSDCE

$7C

Notes

It is not necessary to connect TCLK to this module.

Version 21.1 MIBS 12-10-90

Channel 0

This channel, when armed, outputs a pulse delayed from MIBS event $78 which initiates the transfer of protons that are destined for fixed-target physics from the Main Ring to the Tevatron. The channel is armed 100 microseconds after the BP/AIP signal from Tevatron CAMAC Crate $E9 is asserted. The channel is not armed when BP/AIP is false. T:E17DFT is the parameter assigned to the delay for this channel. This channel normally operates during a Main Ring cycle marked by TCLK event $21.

Channel 1

This channel, when armed, outputs a pulse delayed from MIBS event $7C which initiates the transfer of protons that are destined for colliding physics from the Main Ring to the Tevatron. The channel is armed 100 microseconds after the BP/AIP signal from Tevatron CAMAC Crate $E9 is asserted. The channel is not armed when BP/AIP is false. T:E17DCP is the parameter assigned to the delay for this channel. This channel normally operates during a Main Ring cycle marked by TCLK event $2B.

Module Location

$E1 N18 (Tevatron)

Unique Pals

27912B.ABL , 27937F.ABL , 27941R.ABL , 27942I.ABL

TDCE

$21 + $2B

BSDCE

$78 + $7C

Notes

It is not necessary to connect TCLK to this module. The channel outputs are normally wire-ored together. The outputs are also wire-ored to $E9 N20 Channel 0. The one shot on External Trig 0 is set to approximately 100 microseconds. The BP/AIP signal from Crate $E9 is applied to the External Trig 0 Input. Version 21.1 is different by use of 27912B.ABL which hopes to cure a persistent read problem.

Version 22.1 TVMIBS 150 GeV Proton Extraction from TEV 2-6-91

Channel 0

This channel, which is always armed, generates pulses delayed from MIBS event $D8. The delay setting for this channel may range from 0 to 65535 clock ticks. In that this channel is a spare, there is no assigned name to the delay parameter.

Channel 1

This channel fires the E17K3 Kicker when protons are being transferred from the Tevatron to the Main Ring. The channel is always armed and outputs a pulse referenced to MIBS event $D8. T:TE17E3 is the assigned parameter name to the delay value. This channel is wire-ored to the output of another 279. See below for details. This channel is thought to be operative only during the special studies of the P-Bar transfer line.

Module Location

$E5 N20 (Tevatron)

Unique Pals

27941S.ABL , 27942D.ABL

TDCE

none

BSDCE

$D8

Notes

It is not necessary to connect TCLK to this module. There is no need to install chips at locations 9, 10, 16, 26, 32, and 37. The Channel 1 output of this module is wire-ored to the Channel 1 output of the 279 module [V3.0] at crate $E5 N19. 57-4 and 5 are pulled-up to allow delays longer than a single turn for Channel 0. Not necessary for this application but ok to leave as is. This module is identical to Version 14.2. 2-6-91 Note: Clock input changed from TVBS to MIBS In accord with $D8 transfer. SPECIAL NOTE: Channel 1 was named T:E17E2. The name was changed on 3-18-88 to T:E17E3 to reflect that it is really controlling the E17K3 Kicker. Crawford, Harrison, Finley, Gannon, Martin, and Hanna have been informed.

Version 23.0 TVBS

Channel 0

The output of this channel is referenced to TVBS event $AA. The maximum delay is 157 [9D Hex] TVBS clock ticks.

Channel 1

The output of this channel is referenced to TVBS event $AA. The maximum delay is 157 [9D Hex] TVBS clock ticks.

Module Location

Meson Target Building, Crate 60 N5

Unique Pals

27941A.ABL , 27942C.ABL

TDCE

none

BSDCE

$AA + $55

Notes

It is not necessary to connect TCLK to this module. The TCLK decoder chip should be removed.

Version 24.1 MIBS

Channel 0

This channel is always armed and outputs a pulse delayed from MIBS event $7D or $7E. Parameter M:BPMTSH is assigned to the delay value. This channel is wire-ored to the two outputs of the 279 module at $80 N19. This channel is operative when 8 Gev protons are injected into the Debuncher or Accumulator to test the P-Bar Source to Main Ring transfer lines.

Channel 1

This channel is always armed and outputs a pulse delayed from MIBS event $7A. There is currently no use of this channel and no parameter name is assigned to the delay value.

Module Location

$80 N19 (MUON)

Unique Pals

27941BB.ABL , 27942D.ABL

TDCE

none

BSDCE

$7A + $7D + $7E

Notes

It is not necessary to connect TCLK to this module. The TCLK decoder chip should not be installed.

Version 25.2 MIBS out of service 12/99

Channel 0

This channel, which is armed by any Main Ring reset as marked by TCLK events $20, $21, $29, $2A, $2B, $2D, and $2E and is disarmed by TCLK events $26 or $2F, generates pulses delayed from MIBS event $AA. The delay setting for this channel may range from 0 to 65535 clock ticks. C:MRBLNK is the assigned name for this delay channel.

Channel 1

This channel is similar to Channel 0 except that it is always armed. C:MRSYN is the assigned name for this delay channel.

Module Location

removed 12/99 $DB N1(Tevatron)CDF Counting Room

Unique Pals

27937J.ABL , 27941B.ABL , 27942N.ABL

TDCE

$81

BSDCE

$77

Notes

It is necessary to connect TCLK to this module. 57-1, 2, 4, and 5 are pulled-up to allow delays longer than a single turn. The 100 ohm resistors in this area should be removed.

Version 26.2 TVBS Tevatron Proton Abort Kicker 1-30-92

Channel 0

This channel, when armed, generates a single pulse delayed from TVBS event $AA. The delay setting for this channel may range from 0 to 65535 TVBS clock ticks. T:B48TRG is the currently assigned name for this delay channel. The channel is armed by the high to low transition of the BP/AIP signal that is applied to the Ext Trig 0 Input if the BP signal has been up for at least 100 milliseconds. The channel is also armed by TCLK event $4B which is the Tevatron Clean-Up Pulse. This channel fires the Tevatron MI40 Kicker which aborts protons from the Tevatron.

Channel 1

This channel, used as a diagnostic trigger, is similar to Channel 0 except that it does not arm on the receipt of TCLK event $4B if the BP/AIP signal is low (inhibiting). T:TDCTRG is the currently assigned name for this delay channel.

Module Location

$1C N2 (Tevatron)

Unique Pals

27937P.ABL , 27941L.ABL , 27942L.ABL

TDCE

$4B

BSDCE

$D7 + $D8

Notes

It is absolutely necessary to connect TCLK to this module. The one-shot on the Ext Trig 0 Input is wired to fire on the falling edge of the applied signal. 10-5 should be wired to 9-10 rather than to 9-12. The Ext Trig 0 Input is wired to the BP/AIP output signal from the $1C TSCC. TCLK event $4B is stretched to the necessary 750 nsec by employing the DVALID pin of the TCLK decoder rather than the DECEN pin. Accordingly, wire IC #37-6 to IC #32-6 rather than to #32-8. ET1 of the PAL at location #37 is defined as an output. Pin 2 of IC #9 must be removed from the IC socket. The high side of the one-shot at IC #10 is set to time at about 100 milliseconds and fires when BP goes high. 57-1, 2, 4, and 5 are pulled-up to allow delays longer than a single turn. The 100 ohm resistors in this area should be removed.

Version 27.1 TVBS

Channel 0

This channel, which is always armed, generates pulses delayed from TVBS event $AA. The delay setting for this channel may range from 0 to 65535 clock ticks. T:MCRST0 is the assigned name for this delay channel.

Channel 1

This channel is similar to Channel 0. T:MCRST1 is the assigned name for this delay channel.

Module Location

$01 N6 (Switchyard)

Unique Pals

27941L.ABL , 27942D.ABL

TDCE

none

BSDCE

$D7 + $D8

Notes

It is not necessary to connect TCLK to this module. There is presently no requirement for a PAL at IC location 37. There is no need for ICs at locations 9, 10, 16, 26, 32, and 37. 57-1, 2, 4, and 5 are pulled-up to allow delays longer than a single turn. The 100 ohm resistors in this area should be removed.

Version 28.3 MIBS/RRBS MI/RR BPM Flash $7C 5-20-03

Channel 0

This channel is armed by TCLK events $13, $14, $15, $16, $19, and $1C. It is unarmed by the generation of an output pulse or by TCLK events $12 or $17. The reference is not a Beam Sync event, but rather and externally applied trigger from the Booster extraction timing hardware in the Booster East Gallery. This trigger, affectionately known as the "Dinkel Pulse" in the past but herewith referred to as "Booster Extraction Sync" (BES), is always synchronous with the Booster to MI/RR beam transfer. The delay setting for this channel, which is named I:BPFTBM and R:BPFTBR, may range from 0 to 65535 MIBS/RRBS clock ticks

Channel 1

This channel, which is always armed, generates an output pulse delayed from MIBS event $75. This event initiates the transfer of fixed-target protons from the Main Injector to Switchyard. The delay setting for this channel, which is named M:BPFTMT, may range from 0 to 65535 MIBS clock ticks. revolutions. This channel is normally operative during a $21 Main Injector cycle.

Module Location

$09 N9 and 16 (TCLK)

Unique Pals

27937W.ABL , 27941T2.ABL , 27942K.ABL

TDCE

"Booster Extraction Sync"

BSDCE

$75

Notes

TCLK must be connected to this module. The "BES Pulse" is applied to the Ext Trig 0 input. The associated input one shot (low side of IC #10) is modified to time to 400 ns rather than 750 ns. The /TDCE and /BSDCE lines are jumpered by IC #36-11. The circuits normally sourced by IC #41-11 are to be driven by /BS1 at IC #41-15.

Version 29.0 MIBS

Channel 0

This channel, which is always armed, generates an output pulse delayed from MIBS event $79. This event initiates the transfer of beam from the Main Ring to the P-Bar production target. The delay setting for this channel, which is named M:BPFTMD, may range from 0 to 65535 MIBS clock ticks or up to 412 Main Ring revolutions. This channel is normally operative during a $29 Main Ring cycle.

Channel 1

This channel, which is always armed, generates an output pulse delayed from MIBS event $7A. This event initiates the transfer of P-Bars from the Accumulator to the Main Ring. The delay setting for this channel, which is named M:BPFTAM, may range from 0 to 65535 MIBS clock ticks or up to 412 Main Ring revolutions. This channel is normally operative during a $2A Main Ring cycle.

Module Location

$09 N10 (Switchyard)

Unique Pals

27941U.ABL , 27942D.ABL

TDCE

none

BSDCE

$7B

Notes

It is not necessary to connect TCLK to this module. There is no need to install the TCLK decoder at Loc #32. The PAL at location #37 is not necessary. The BSDCE Output (MIBS $7B) is wired to the Ext Trig 0 input of the 279 module at N15. Both outputs of this module are wire-ored with those from N9, N11, N12, and N13.

Version 30.0 MIBS

Channel 0

This channel, which is always armed, generates an output pulse delayed from MIBS event $7B. This event initiates the transfer of a single coalesced P-Bar bunch from the Main Ring to the Tevatron. The delay setting for this channel, which is named M:BPFT7B, may range from 0 to 65535 MIBS clock ticks or up to 412 Main Ring revolutions. This channel is normally operative during a $2A Main Ring cycle.

Channel 1

This channel, which is always armed, generates an output pulse delayed from MIBS event $7C. This event initiates the transfer of a single coalesced proton bunch from the Main Ring to the Tevatron. The delay setting for this channel, which is named M:BPFT7C, may range from 0 to 65535 MIBS clock ticks or up to 412 Main Ring revolutions. This channel is normally operative during a $2B Main Ring cycle.

Module Location

$09 N11 (Switchyard)

Unique Pals

27941V.ABL , 27942D.ABL

TDCE

none

BSDCE

$7C

Notes

It is not necessary to connect TCLK to this module. There is no need to install the TCLK decoder at Loc #32. The PAL at location #37 is not necessary. The BSDCE Output (MIBS $7C) is wired to the Ext Trig 0 input of the 279 module at N16. Both outputs of this module are wire-ored with those from N9, N10, N12, and N13.

Version 31.2 MIBS MI BPM Flash $7C 2-6-91

Channel 0

This channel, which is always armed, generates an output pulse delayed from MIBS events $7D or $7E. This event initiates the transfer of 8 Gev protons from the Main Ring to the Debuncher or Accumulator. The delay setting for this channel, which is named M:BPFT7E, may range from 0 to 65535 MIBS clock ticks or up to 412 Main Ring revolutions. This channel is normally operative during a $2D Main Ring cycle.

Channel 1

This channel, which is always armed, generates an output pulse delayed from MIBS event $D8. This event inititiates the transfer of protons from the Tevatron to the Main Ring. The delay setting for this channel, which is named M:BPFTTM, may range from 0 to 65535 MIBS clock ticks or up to 412 Main Ring revolutions. This channel is normally operative during a $20 Main Ring cycle.

Module Location

$09 N12 (Switchyard)

Unique Pals

27941II.ABL , 27942D.ABL

TDCE

BSDCE

MIBS event $D8

Notes

It is not necessary to connect TCLK to this module. There is no need to install the TCLK decoder at Loc #32. There is no need for a PAL at Loc #37. One shots at Locations #10 and #26 may also be removed. The /TDCE and /BSDCE lines are jumpered by IC #36-11 so that $D8 will appear on both outputs. Both outputs of this module are wire-ored with those from N9, N10, N11, and N13.

Version 32.0 MIBS

Channel 0

This channel is externally armed by an output from a 177 timing module named M:BPFTT1. This 177 channel may have its TCLK reference and delay programmed to the user's needs. Once armed, this channel generates an output pulse delayed from MIBS event $AA. The channel is unarmed after the generation of an output pulse. The delay setting for this channel, which is named M:BPFTD1, may range from 0 to 65535 MIBS clock ticks or up to 412 Main Ring revolutions.

Channel 1

This channel is similar to Channel 0. The 177 timing channel is named M:BPFTT2. The programmable delay for this 279 channel is named M:BPFTD2.

Module Location

$09 N13 (Switchyard)

Unique Pals

27937A.ABL , 27941B.ABL , 27942L.ABL

TDCE

none

BSDCE

$77

Notes

It is not necessary to connect TCLK to this module. There is no need to install the TCLK decoder at Loc #32. 57-1, 2, 4, and 5 are pulled-up to allow delays longer than a single turn. The 100 ohm resistors in this area should be removed. The 177 module timing channel outputs are applied to the Ext Trig 0 and 1 Inputs. Both outputs of this module are wire-ored with those from N9, N10, N11, and N12.

Version 33.1 MIBS TEV BPM Flash $77 2-6-91

Channel 0

This channel, which is always armed, generates an output pulse delayed from MIBS event $78. This event inititiates the transfer of fixed-target protons from the Main Ring to the Tevatron. The delay setting for this channel, which is named T:BPFTMT, may range from 0 to 65535 MIBS clock ticks or up to 412 MI/Tevatron revolutions. This channel is normally operative during a $4D Tevatron cycle with a $21 Main Ring cycle.

Channel 1

This channel, which is always armed, generates an output pulse delayed from MIBS event $D8. This event initiates the transfer of protons from the Tevatron to the Main Ring. The delay setting for this channel, which is named T:BPFTTM, may range from 0 to 65535 MIBS clock ticks or up to 412 MI/Tevatron revolutions. This channel is normally operative during a $4D Tevatron cycle and a $20 Main Ring cycle.

Module Location

$09 N14 (Switchyard)

Unique Pals

27941JJ.ABL , 27942D.ABL

TDCE

MIBS event $78

BSDCE

MIBS event $D8

Notes

It is not necessary to connect TCLK to this module. There is no need to install the TCLK decoder at Loc #32. There is no need for a PAL at Loc #37. One shots at Locations #10 and #26 may also be removed. The /BS1 ($78) output of PAL #41 is wired to the internal /TDCE line. Accordingly, wire 41-15 to 37-15. Both outputs from this module are wire-ored with those from N15 and N16. The BSDCE Output of this module, MIBS $D8, is wired to a TCLK 175 module channel to generate TCLK $55.

Version 34.0 TVBS Beam Position Flash Triggers 8-18-99

Channel 0

This channel, which is always armed, generates an output pulse delayed from MIBS event $7B. This event, which is externally sourced from the 279 module in N10, inititiates the transfer of a single coalesced P-Bar bunch from the Main Ring to the Tevatron. The delay setting for this channel, which is named T:BPFT7B, may range from 0 to 65535 TVBS clock ticks or up to 412 Tevatron revolutions. This channel is normally operative during a $40 Tevatron cycle.

Channel 1

This channel is externally armed by an output from a 177 timing module named T:BPFTT1. This 177 channel may have its TCLK reference and delay programmed to the user's needs. Once armed, this channel generates an output pulse delayed from TVBS event $AA. The channel is unarmed after the generation of an output pulse. The delay setting for this channel, which is named T:BPFTD1, may range from 0 to 65535 TVBS clock ticks or up to 412 Tevatron revolutions.

Module Location

$09 N15 (Switchyard)

Unique Pals

27937I.ABL , 27941Y.ABL , 27942M.ABL

TDCE

BSDCE

MIBS event $7B

Notes

It is not necessary to connect TCLK to this module. There is no need to install the TCLK decoder at Loc #32. The BSDCE Output (MIBS $7B) from the 279 module at N10 is wired to the Ext Trig 0 Input of this module. The 177 timing channel output is applied to the Ext Trig 1 Input. Both outputs from this module are wire-ored with those from N14 and N16. 57-1 and -2 are pulled-up to allow delays longer than a single turn for Channel 1. The associated 100 ohm resistor should be removed. The /TDCE and /BSDCE lines are jumpered by IC #36-11. This version of the 279 is identical to Version 35.0.

Version 35.0 TVBS Beam Position Flash Triggers 8-18-99

Channel 0

This channel, which is always armed, generates an output pulse delayed from MIBS event $7C. This event, which is externally sourced from the 279 module in N11, inititiates the transfer of a single coalesced proton bunch from the Main Ring to the Tevatron. The delay setting for this channel, which is named T:BPFT7C, may range from 0 to 65535 TVBS clock ticks or up to 412 Tevatron revolutions. This channel is normally operative during a $4D Tevatron cycle and a $2B Main Ring cycle.

Channel 1

This channel is externally armed by an output from a 177 timing module named T:BPFTT2. This 177 channel may have its TCLK reference and delay programmed to the user's needs. Once armed, this channel generates an output pulse delayed from TVBS event $AA. The channel is unarmed after the generation of an output pulse. The delay setting for this channel, which is named T:BPFTD2, may range from 0 to 65535 TVBS clock ticks or up to 412 Tevatron revolutions.

Module Location

$09 N16 (Switchyard)

Unique Pals

27937I.ABL , 27941Y.ABL , 27942M.ABL

TDCE

BSDCE

MIBS event $7C

Notes

It is not necessary to connect TCLK to this module. There is no need to install the TCLK decoder at Loc #32. The BSDCE Output (MIBS $7C) from the 279 module at N11 is wired to the Ext Trig 0 Input of this module. The 177 timing channel output is applied to the Ext Trig 1 Input. Both outputs from this module are wire-ored with those from N14 and N15. 57-1 and -2 are pulled-up to allow delays longer than a single turn for Channel 1. The associated 100 ohm resistor should be removed. The /TDCE and /BSDCE lines are jumpered by IC #36-11. This version of the 279 is identical to Version 34.0.

Version 36.0 MIBS Beam Position Flash Triggers 8-18-99

Channel 0

This channel, which is always armed, generates pulses delayed from MIBS event $AA. The delay setting for this channel may range from 0 to 157 clock ticks or 1 turn maximum. The assigned name for this delay channel is I:BPFTD6.

Channel 1

This channel, which is always armed, generates pulses delayed from MIBS event $AA. The delay setting for this channel may range from 0 to 157 clock ticks or 1 turn maximum. The assigned name for this delay channel is T:BPFTD6.

Module Location

$09 N8 (Switchyard)

Unique Pals

27941RR.ABL , 27942D.ABL

TDCE

$D6

BSDCE

$D6

Notes

It is not necessary to connect TCLK to this module. One jumper wire must be added #37-15 TDCE to #41-15 BS1. Also 1500pf cap to ground added to #41-12.

Version 36.1 RRBS Beam Position Flash Triggers 8-18-99

Channel 0

This channel, which is always armed, generates pulses delayed from MIBS event $A0. The delay setting for this channel may range from 0 to 157 clock ticks or 1 turn maximum. The assigned name for this delay channel is I:BPFTA0.

Channel 1

This channel, which is always armed, generates pulses delayed from MIBS event $A7. The delay setting for this channel may range from 0 to 157 clock ticks or 1 turn maximum. The assigned name for this delay channel is T:BPFTA7.

Module Location

TCLK $09 N7

Unique Pals

27941SS.ABL , 27942D.ABL

TDCE

$A7

BSDCE

$A0

Notes

It is not necessary to connect TCLK to this module. One jumper wire must be added #37-15 TDCE to #41-15 BS1. Also 1500pf cap to ground added to #41-12.

Version 36.2 RRBS Beam Position Flash Triggers 8-18-99

Channel 0

This channel, which is always armed, generates pulses delayed from MIBS event $AA. The delay setting for this channel may range from 0 to 157 clock ticks or 1 turn maximum. The assigned name for this delay channel is I:BPFTA2.

Channel 1

This channel, which is always armed, generates pulses delayed from MIBS event $AA. The delay setting for this channel may range from 0 to 157 clock ticks or 1 turn maximum. The assigned name for this delay channel is T:BPFTA3.

Module Location

$09 N6 (Switchyard)

Unique Pals

27941TT.ABL , 27942D.ABL

TDCE

$A3

BSDCE

$A2

Notes

It is not necessary to connect TCLK to this module. One jumper wire must be added #37-15 TDCE to #41-15 BS1. Also 1500pf cap to ground added to #41-12.

Version 37.2 xxBS Diagnostic Trigs Currently a SPARE! 11-23-92

Channel 0

This channel, which is always armed, generates pulses delayed from TVBS event $AA. The delay setting for this channel may range from 0 to 157 clock ticks (1 turn max). Various names are assigned for this delay channel.

Channel 1

This channel, which is always armed, generates pulses delayed from TVBS events $AA, $BB, and $CC. The delay setting for this channel may range from 0 to approximately 51 clock ticks, or up to a third of a turn. For longer programmed delays, there is no channel output because the delay counter is reset every third of a turn. Various names are assigned for this delay channel. Chn 0 Chn 1

Module Location

$2C N17 (Tevatron) C:735TS0, C:735TS1 $2C N13 (Tevatron) C:735TS4, C:735TS5 $4E N5 (Tevatron) C:TVBAA1, C:TVBBC1 FORMER $4E N6 (Tevatron) C:TVBAA2, C:TVBBC2 LOCATIONS $4E N7 (Tevatron) C:TVBAA3, C:TVBBC3 $4E N8 (Tevatron) C:TVBAA4, C:TVBBC4 $4E N9 (Tevatron) C:TVBAA5, C:TVBBC5 $4E N10 (Tevatron) C:TVBAA6, C:TVBBC6

Unique Pals

27941Z.ABL , 27942C.ABL

TDCE

none

BSDCE

none (MIBS $77)

Notes

It is not necessary to connect TCLK to this module. There is presently no requirement for a PAL at IC location 37. The TCLK decoder at location 32 should be removed.

Version 38.1 MIBS

Channel 0

This channel, which is always armed, generates pulses delayed from the "or" of MIBS events $79 and $7D. The delay setting for this channel may range from 0 to 65535 clock ticks. P:xxxxxx is the assigned name for this delay channel.

Channel 1

This channel is similar to Channel 0. P:xxxxxx is the assigned name for this channel.

Module Location

$5x Nxx (P-BAR)

Unique Pals

27941CC.ABL , 27942C.ABL

TDCE

none

BSDCE

$79 + $7D

Notes

It is not necessary to connect TCLK to this module. There is presently no requirement for a PAL at IC location 37. The TCLK decoder at location 32 should be removed.

Version 39.1 xxBS Diagnostic Trigs Currently a SPARE! 11-23-92

Channel 0

This channel is armed during the Main Ring cycle in which the A or B or C small proton batches are accelerated and coalesced. The arming gate is set and reset by TCLK events $2B and $26 respectively. Once armed, Channel 0 generates pulses delayed from MIBS events $AA or $BB or $CC. The delay is from $AA if TCLK $15 occurs after the $2B event, from $BB if TCLK $19 occurs after the $2B event, and from $CC if TCLK $1C occurs after the $2B event. The delay setting for this channel may range from 0 to 157 clock ticks (9D HEX - or 1 machine revolution). C:MRBGAT is the assigned name for this delay channel.

Channel 1

This channel is always armed and generates pulses delayed from MIBS event $AA. The delay setting for this channel may range from 0 to 157 clock ticks (1 turn max). C:MRBAA is the assigned name for this delay channel.

Module Location

$4E N4 (Tevatron) - Former Location

Unique Pals

27937K.ABL , 27941DD.ABL

TDCE

$2B to $26 Flag

BSDCE

$77 + $7C

Notes

TCLK must be connected to this module. Float IC #65 pin 9. Wire IC #65-9 to #65-11. Install jumper socket at IC #42 location with the following pins jumpered: 2 to 6, 3 to 7, 4 to 8, 9 to 18 and 19, 14 to 17, and 15 to 16.

Version 40.2 MIBS 5-7-90

Channel 0

This channel, which is always armed, generates pulses delayed from MIBS event $AA. The delay setting for this channel may range from 0 to 65535 clock ticks or up to 412 Main Ring revolutions. M:BSTRG0 is the assigned name for this delay channel.

Channel 1

This channel is exactly similar to Channel 0. M:BSTRG1 is the assigned name for this delay channel.

Module Location

$85 N18 (DEC-R)

Unique Pals

27941B.ABL , 27942C.ABL

TDCE

none

BSDCE

$77

Notes

It is not necessary to connect TCLK to this module. There is presently no requirement for a PAL at IC location 37. The TCLK decoder chip at location 32 should be removed. 57-1, -2, -4, and -5 are pulled-up to allow delays longer than a single turn for both Channel 0 and 1. The 100 ohm resistors in this area should be removed.

Version 41.2 TVBS 5-7-90

Channel 0

This channel, which is always armed, generates pulses delayed from TVBS event $AA. The delay setting for this channel may range from 0 to 65535 clock ticks or up to 412 Tevatron revolutions. T:BSTRG0 is the assigned name for this delay channel.

Channel 1

This channel is exactly similar to Channel 0. T:BSTRG1 is the assigned name for this delay channel.

Module Location

$85 N19 (DEC-R)

Unique Pals

27941L.ABL , 27942C.ABL

TDCE

none

BSDCE

$D7 + $D8

Notes

It is not necessary to connect TCLK to this module. There is presently no requirement for a PAL at IC location 37. The TCLK decoder chip at location 32 should be removed. 57-1, -2, -4, and -5 are pulled-up to allow delays longer than a single turn for both Channel 0 and 1. The 100 ohm resistors in this area should be removed.

Version 42.0 MIBS

Channel 0

This channel will fire the kicker when 8 Gev protons are being transferred from the Main Ring to the Accumulator. The associated accelerator resets for this operation are TCLK event $16 for the Booster and TCLK event $2D for the Main Ring. This channel will output a pulse delayed from MIBS event $7E. Parameter A:PINJK is assigned to the delay value.

Channel 1

This channel will fire the kicker when a small 53 MHz bunched P-Bar batch on the extraction orbit of the Accumulator is being transferred to the Main Ring. The associated accelerator resets for this operation are TCLK events $91, $9A, $9B, or $9C for the Accumulator (to tag the unstack process for a X, Y, or Z P-Bar bunch) and TCLK event $2A for the Main Ring. This channel will output a pulse delayed from MIBS event $7A. Parameter A:PBEXTK is assigned to the delay value.

Module Location

$19 N13 (P-Bar)

Unique Pals

27941D.ABL , 27942D.ABL

TDCE

none

BSDCE

$7A + $7E

Notes

It is not necessary to connect TCLK to this module. This module is not actively being used at the present time but is provided in hopes of replacing the 277 MIBS timer currently used. A final implementation would require two separate LeCroy 4222 modules, one for each channel output to provide finer delays than achievable with the 279. The LeCroy 4222 delays would normally range from 0 to 132 nanoseconds. Note that the LeCroy 4222 presents a fixed delay of 170 nanoseconds for zero programmed delay. The 4222 outputs should be wire-ored before application to the kicker. This module is exactly similar to Version 4.1 which provides triggers to the E48 Kicker in the Main Ring.

Version 43.2 TVBS Barsotti BPM Test Trigger 9-21-92

Channel 0

This channel, which is always armed, generates pulses delayed from TVBS event $AA. The delay setting for this channel may range up to one turn, from 0 to 157 ($9D) clock ticks. The width of the output pulse for this channel (both front and rear panel) is specially set at approximately 2109 nanoseconds. The assigned name for this delay channel is T:E2IGAT.

Channel 1

This channel is similar to Channel 0, except there is no modification of the output pulse width. There is no assigned name for this delay channel.

Module Location

$E2 N18 (Tevatron)

Unique Pals

27941A.ABL 27942D.ABL

TDCE

none

BSDCE

$AA + $55

Notes

It is not necessary to connect TCLK to this module. There is presently no requirement for a PAL at IC location 37. The TCLK decoder chip at location 32 need not be installed. The 100 ohm resistors in the area 57-1, 2, 4, and 5 installed to prohibit delays longer than a single turn. Timing components at IC #58 (high side) are 8.2k and 560 pf which yields 2150 nanoseconds. 12MAR93 Note: This version is now installed in all numbered Service Buildings with the exception of A2.

Version 44.2 ANTIPROTON TVBS 5-7-90

Channel 0

This channel, which is always armed, generates pulses delayed from TVBS event $AA. The delay setting for this channel may range from 0 to 65535 clock ticks or up to 412 Tevatron revolutions. T:BSTRG2 is the assigned name for this delay channel.

Channel 1

This channel is exactly similar to Channel 0. T:BSTRG3 is the assigned name for this delay channel.

Module Location

$85 N17 (DEC-R)

Unique Pals

27941L.ABL , 27942C.ABL

TDCE

none

BSDCE

none (TVBS $D7 + $D8)

Notes

It is not necessary to connect TCLK to this module. There is presently no requirement for a PAL at IC location 37. The TCLK decoder chip at location 32 should be removed. 57-1, -2, -4, and -5 are pulled-up to allow delays longer than a single turn for both Channel 0 and 1. The 100 ohm resistors in this area should be removed.

Version 45.1 xxBS Diagnostic Trigs Currently a SPARE! 11-23-92

Channel 0

This channel, which is always armed, generates pulses delayed from TVBS event $BB. The delay setting for this channel may range from 0 to 157 clock ticks or up to one Tevatron revolution.

Channel 1

This channel, which is always armed, generates pulses delayed from TVBS event $CC. The delay setting for this channel may range from 0 to 157 clock ticks or up to one Tevatron revolution. Chn 0 Chn 1

Module Location

$2C N14 (Tevatron) C:735TS2, C:735TS3 $2C N12 (Tevatron) C:735TS6, C:735TS7 (Former Locations)

Unique Pals

27941EE.ABL , 27942C.ABL

TDCE

none

BSDCE

none

Notes

It is not necessary to connect TCLK to this module. There is presently no requirement for a PAL at IC location 37.

Version 46.0 xxBS

Channel 0

This channel is armed by an external timing channel applied to the External Trig 0 Input. The delay may range from 0 to 65535 beam sync clock ticks or up to 780 MI/RR revolutions.

Channel 1

This channel is armed by an external timing channel applied to the External Trig 1 Input. The delay may range from 0 to 65535 beam sync clock ticks or up to 780 MI/RR revolutions.

Module Location

Many

Unique Pals

27937A.ABL , 27941B.ABL , 27942L.ABL

TDCE

none

BSDCE

none (MIBS $77)

Notes

It is not necessary to connect TCLK to this module. Remove ICs at Locations #16, #26, and #32. To accommodate delays greater than one turn, pull- up pins 1, 2, 4, and 5 of IC #57 and remove the two 100 ohm resistors near IC #56.

Version 47.0 TVBS

Channel 0

This channel, which is always armed, generates pulses delayed from TVBS events $AA, $BB, and $CC. The delay setting for this channel may range from 0 to 51 (33 Hex) clock ticks or up to a third Tevatron revolution. Larger programmed delays will result in no channel output. T:SA17T0 is the assigned name for this delay channel.

Channel 1

This channel, which is always armed, generates pulses delayed from TVBS events $AA, $BB, and $CC. The delay setting for this channel may range from 0 to 51 (33 Hex) clock ticks or up to a third Tevatron revolution. Larger programmed delays will result in no channel output. T:SA17T1 is the assigned name for this delay channel.

Module Location

$A9 N16 (Tevatron)

Unique Pals

27941FF.ABL , 27942C.ABL

TDCE

none

BSDCE

$AA

Notes

It is not necessary to connect TCLK to this module. There is presently no requirement for a PAL at IC location 37. The TCLK decoder at location 32 should be removed.

Version 48.0 MIBS

Channel 0

This channel is armed by the receipt of TCLK event $2A. It remains armed until the receipt of any of the TCLK MI resets ($20, $21, $29, $2B, $2D, $2E). This channel generates a pulse delayed from MIBS event $AA. The delay setting for this channel may range from 0 to 51 (33 Hex) clock ticks or up to a third of a MI revolution. Larger programmed delays will result in no channel output. M:SBPS is the assigned name for this delay channel.

Channel 1

This channel is armed by the receipt of TCLK events $20 + $21 + $29 + $2B + $2D + $2E. It remains armed until the receipt of TCLK events $2A. This channel generates a pulse delayed from MIBS event $AA. The delay setting for this channel may range from 0 to 51 (33 Hex) clock ticks or up to a third of a MI revolution. Larger programmed delays will result in no channel output. M:SBAPS is the assigned name for this delay channel.

Module Location

$83 N23 (TEV RF)

Unique Pals

27937R.ABL , 27941A.ABL , 27942Q.ABL

TDCE

$2A

BSDCE

$AA

Notes

The normal operation of this module requires TCLK and BSCLK application. The channel 0 output is wire-ored to the channel 1 output of this 279 module. The resulting signal drives a solid state RF switch to give a "fake beam" input to the RF electronics at F11.

Version 49.0 TVBS 6-13-95

Channel 0

This channel, which is always armed, generates pulses delayed from TVBS event $DA. The delay setting for this channel may range from 0 to 157 clock ticks (1 turn max). The channel is armed upon power up or module clear.

Channel 1

This channel is similar to Channel 0 but it references TVBS event $AA. The device names assigned to this module at C0 are E:XLTS0 and E:XLTS1. These can be found on page C42 subpage 13, but use EXTREME caution: kicker firing may result!

Module Location

TEV $A1 N22 TEV $3C N3 TRF $62 N19 TEV $B4 N17 TEV $3C N9

Unique Pals

27941KK.ABL , 27942D.ABL

TDCE

none

BSDCE

$DA BS1 = $AA

Notes

It is not necessary to connect TCLK to this module. There is presently no requirement for a PAL at location 37. The TCLK decoder at location 32 should be removed.

Version 50.0 TVBS Collider Diagnostics10-13-95

Channel 0

C:BTASRT $AA reference

Channel 1

C:BTASTP $AA reference

Module Location

$DB N21 (Tevatron)

Unique Pals

27941NN.ABL , 27942D.ABL

TDCE

None

BSDCE

$CC

Notes

It is not necessary to connect TCLK to this module. Associated ICs should be removed. 1500 pf capacitor to ground installed at #41-12 (BS4) to effect a shorten up of R0 & R1.

Version 51.0 TVBS Collider Diagnostics10-13-95

Channel 0

C:BTBSRT $BB reference

Channel 1

C:BTBSTP $BB reference

Module Location

$DB N22 (Tevatron)

Unique Pals

27941OO.ABL , 27942D.ABL

TDCE

None

BSDCE

$BB

Notes

It is not necessary to connect TCLK to this module. Associated ICs should be removed. 1500 pf capacitor to ground installed at #41-12 (BS4) to effect a shorten up of R0 & R1.

Version 52.0 TVBS Collider Diagnostics10-13-95

Channel 0

C:BTCSRT $CC reference

Channel 1

C:BTCSTP $CC reference

Module Location

$DB N23 (Tevatron)

Unique Pals

27941PP.ABL , 27942D.ABL

TDCE

None

BSDCE

$CC

Notes

It is not necessary to connect TCLK to this module. Associated ICs should be removed. 1500 pf capacitor to ground installed at #41-12 (BS4) to effect a shorten up of R0 & R1.

Version 53.1 MIBS Main Inj Damper Beam Sync Trigs 1-3-96

Channel 0

This channel is armed by an external timing channel ( M:DDIAGH from 377 module at $C0 N2 A(6) ) applied to the External Trig 0 Input. M:DFINEH is the parameter assigned to the delay for this channel. The delay may range from 0 to 65535 MIBS clock ticks or up to 412 Main Ring revolutions.

Channel 1

This channel is armed by an external timing channel ( M:DDIAGV from 377 module at $C0 N2 A(7) ) applied to the External Trig 1 Input. M:DFINEV is the parameter assigned to the delay for this channel. The delay may range from 0 to 65535 MIBS clock ticks or up to 412 Main Ring revolutions.

Module Location

$C0 N17 (Main Ring)

Unique Pals

27937D.ABL , 27941NN.ABL , 27942L.ABL

TDCE

none

BSDCE

MIBS $AA

Notes

It is not necessary to connect TCLK to this module. Remove ICs at Locations #16, #26, and #32. To accommodate delays greater than one turn, pull- up pins 1, 2, 4, and 5 of IC #57. A 1500 pf capacitor to ground should be installed at #41-12 (BS4) to shorten up R0 and R1. This will eliminate output timing anomalies for small and near-integer turn delays.

Version 54.0 RRBS

Channel 0

This channel, which is always armed, generates pulses delayed from RRBS event $C0. The delay setting for this channel may range from 0 to 65535 clock ticks. R:IBBGON is the assigned name for this delay channel.

Channel 1

This channel is similar to Channel 0. R:IBBGOF is the assigned name for this delay channel.

Module Location

$90 N17 (Main Injector)

Unique Pals

27941A3.ABL , 27942D.ABL , 27936B.ABL

TDCE

none

BSDCE

$C0

Notes

It is not necessary to connect TCLK to this module. There is presently no requirement for a PAL at IC location 37. There is no need for ICs at locations 9, 10, 16, 26, 32, and 37. 57-1, 2, 4, and 5 are pulled-up to allow delays longer than a single turn. The 100 ohm resistors in this area should be removed.

Version 55.0 MIBS

Channel 0

$7B reference

Channel 1

$D8 reference

Module Locations

$6B N4 (T902)
$73 N18 (T914)

Unique Pals

27941A4.ABL

TDCE

none

BSDCE

$7B + $D8

Notes

It is not necessary to connect TCLK to this module. There is no need for ICs at locations 9, 10, 16, 26, 32, and 37. 57-1, 2, 4, and 5 are pulled-up to allow delays longer than a single turn. The 100 ohm resistors in this area should be removed.

Version 56.0 TVBS Instrumentation Trigger

Channel 0

This channel, which is always armed, generates pulses delayed from TVBS event $AA. The delay setting for this channel may range from 0 to 65535 clock ticks or up to 412 Tevatron revolutions. T:FNORD is the assigned name for this delay channel.

Channel 1

This channel is exactly similar to Channel 0. There is no assigned name for this delay channel..

Module Location

$F1 N11 (MI)

Unique Pals

27941A.ABL 27942D.ABL

TDCE

none

BSDCE

$AA + $55

Notes

It is not necessary to connect TCLK to this module. There is presently no requirement for a PAL at IC location 37. The TCLK decoder chip at location 32 should be removed. 57-1, -2, -4, and -5 are pulled-up to allow delays longer than a single turn for both Channel 0 and 1. The 100 ohm resistors in this area should be removed.

Version 57.0 TCLK $B5 Generation

Channel 0

This channel is always armed and outputs a pulse delayed from RRBS event $A3. This channel output is wire-ored to four other 279 outputs. The device name for this channel is R:BPFTA3

Channel 1

This channel is always armed and outputs a pulse delayed from RRBS event $A7. This channel output is wire-ored to four other 279 outputs. The device name for this channel is R:BPFTA7

Module Location

$09 N15 (TCLK)

Unique Pals

27941A5.ABL , 27942D.ABL

TDCE

$A7 RRBS

BSDCE

$A3

Notes

The PAL at location 37 is omitted. It is not necessary to connect TCLK to this module. Chips at locations 9, 10, 16, 26, 32, and 37 need not be loaded. Wire BS1 (41-15) to TDCE (37-15).

Version 58.0 Gap Clearing Instrumentation Trigger

Channel 0

This channel is always armed and outputs a pulse delayed from RRBS event $A3.

Channel 1

This channel is always armed and outputs a pulse delayed from RRBS event $A3.

Module Location

MI $40 N4

Unique Pals

27941A6.ABL , 27942D.ABL

TDCE

$A7 RRBS

BSDCE

$A3

Notes

The PAL at location 37 is omitted. It is not necessary to connect TCLK to this module. Chips at locations 9, 10, 16, 26, 32, and 37 need not be loaded. Wire BS1 (41-15) to TDCE (37-15). 57-1, 2, 4, and 5 are pulled-up to allow delays longer than a single turn. The 100 ohm resistors in this area should be removed.

Version 59.0 Muon Alcove Instrumentation Trigger

Channel 0

This channel outputs a pulse delayed from MIBS event $74.

Channel 1

This channel outputs a pulse delayed from MIBS event $74.

Module Location

NUMI $E9 N20

Unique Pals

27941A7.ABL , 27942D.ABL

TDCE

 

BSDCE

$74

Notes

The PAL at location 37 is omitted. It is not necessary to connect TCLK to this module. Chips at locations 9, 10, 16, 26, 32, and 37 need not be loaded. 57-1, 2, 4, and 5 are pulled-up to allow delays longer than a single turn. The 100 ohm resistors in this area should be removed.