CONTROLS HARDWARE RELEASE NO. 36.1
CAMAC C064 Octal Gate Generator

Robert J. Ducar
August 1, 1984

Table of Contents

^Description

The CAMAC 064 module provides eight gates which may be individually controlled by externally applied set and reset inputs. The set and reset inputs, terminated in 100 ohms, are compatible with CAMAC 177/377 module timing channel outputs. Gate outputs are available at the front panel and rear I/O connector, each sourced by separate 74128 drivers. Gates 1 thru 4 may also modulate four separate Gated Input signals. The developed Gated Output signals are sourced by 74128 drivers and are available at the rear I/O connector. The Gated Input signals are also terminated in 100 ohms. All input and output signals are positive logic. The status of all Gates, Gated Input, and Gated Output signals is provided by a single CAMAC read operation. There is no provision for individual set or reset of a gate by CAMAC operation. All gates are reset by power up or by a programmed CAMAC operation.

The module is also capable of receiving TCLK and providing decoded clock events as sets or resets to individual gates. Two on-board PALs can provide up to sixteen decoded outputs and may be individually programmed as necessary. Implementation of this feature is by wire jumper to the appropriate set, reset, or gated input line after removal of the 100 ohm terminating resistor.

An input may operate on more than one gate. Such facility would also be by on-board wire jumper associated with the removal of unwarranted termination resistors.

Given the customizing options provided by the module, caution is advised when performing in-service replacement.

^CAMAC OP Codes

F(1)A(0)
Read Status
R16R15R14R13R12R11R10R9R8 - R1
GI4GI3GI2GI1G04G03G02G01G8 - Gate n ON - G1
Gated InputGated Output
F(6)A(0)
Reads module number (40 Hex, 64 Dec)
F(7)A(0)
Dummy Read - No data are returned
F(9)A(0)
Reset Module
This command is a logical or with Z*S2 and power up clear. A reset sets each gate off. Reset is also wired to the on-board clock decoder PALs for possible inclusion in output equations

^I/O Assignments

POSSIGNAL POSSIGNAL
1L Common 1R TCLK Input
2L Common 2R Common
3L Set Gate 8 Input 3R Gated Input #4
4L Reset Gate 8 Input 4R Gated Input #3
5L Set Gate 7 Input 5R Gated Input #2
6L Reset Gate 7 Input 6R Gated Input #1
7L Set Gate 6 Input 7R Gated Output #4
8L Reset Gate 6 Input 8R Gated Output #3
9L Set Gate 5 Input 9R Gated Output #2
10L Reset Gate 5 Input 10R Gated Output #1
11L Set Gate 4 Input 11R Gate 8 Output
12L Reset Gate 4 Input 12R Gate 7 Output
13L Set Gate 3 Input 13R Gate 6 Output
14L Reset Gate 3 Input 14R Gate 5 Output
15L Set Gate 2 Input 15R Gate 4 Output
16L Reset Gate 2 Input 16R Gate 3 Output
17L Set Gate 1 Input 17R Gate 2 Output
18L Reset Gate 1 Input 18R Gate 1 Output

^Front Panel

The CAMAC 064 module has the following front panel features:

N led
Red, stretched
TCLK led
Green, on when TCLK is present
GATEn led
Red, on when gate is set on
GATEn Output
Lemo, 74128 driver

^Documentation

0812-ED-35838Schematic
0812-BD-35839 Artwork
0812-BD-35840 Master Drawing
0812-BD-35841 Assembly Drawing
0812-MC-35842 Front Panel Mechanical
0812-MC-35843 Front Panel Silkscreen

^PALS Documentation

Directory: //beamssrv1/ctrlstiming.bd/pals/c064
FilenameDescriptionPAL Type
06401A.ABLNAF Decoder 82S153
06418x.ABLFirst TCLK Decoder 82S153
06422x.ABLSecond TCLK Decoder 82S153

CAUTION: TCLK decoder PALs will undoubtedly be unique to specific installations.

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