CAMAC 290 Module
Multimode Buffered MADC Controller
April 27, 2000
A. Franck, J. Gomilar,
W. Krakar, J. Smedinghoff,
C. Schumann
The CAMAC 290 module provides intelligent interface support for
Fermilab-standard, multiplexed analog to digital converters, MADC's. Both
the older DSE and newer in-house 12-bit and 14-bit MADC versions are
supported. The module will support future MADC's with resolutions up to
16-bits. Timed collection of lists of multiple channels and buffered
collection of single channels is supported.
CONTENTS
DOCUMENT OVERVIEW 3
GENERAL DESCRIPTION 3
SUMMARY OF FEATURES 4
GENERAL ARM AND SAMPLE TRIGGERS 4
PLOTS 5
Sample Triggers, All Plot Modes 5
Plot Mode A, Continuous Recording 5
Plot Mode B, Post-trigger Recording 5
Plot Mode C, Pre-trigger Recording 6
LISTS 7
ALARM MONITORING SYSTEM 7
ALARM BLOCK FORMAT: 8
ALARM REPORT FORMAT: 8
TIME STAMPS 9
PROGRAMMING CONSIDERATIONS 9
FUNCTION CODES AND DATA FORMATS 10
DIAGNOSTIC PROTOCOL, FOP 18
FOP codes supported by the 290 20
MODULE HARDWARE DESCRIPTION 32
I/O Connector Definition 38
FUNCTION CODES SUMMARY 38
FOP TYPECODE SUMMARY 39
DOCUMENT OVERVIEW
This document attempts to outline the CAMAC function codes needed for
the C290 module. It is a modified version of selected parts of Controls
Hardware Release No. 26.5, CAMAC 190 Module.
Major differences from the C190 include:
More plot channels (16).
More lists (15).
Single width CAMAC module.
The C190 specifies plot channel or list number using the
subaddress of a command. With the greater number of lists
and plot channels there are not enough subaddresses available.
The C290 includes new function codes to specify which plot
channel or list number future commands will operate on.
New way of specifying clock events. The C290 has much more
flexible TCLK decoding hardware. The concept of a "clock
decoder" is no longer needed. New function codes to specify
clock events for plot and list setup have been added.
Clock decoder setup functions have been deleted.
LAM bits for lists and plot channels have been eliminated.
These bits are not used by the current CAMAC front ends and
there is not enough room in the LAM source register to add
bits for the new lists and plot channels. The extended
LAM source and mask registers have also been eliminated.
User specifiable buffer size for plot modes B and C. The
maximum size is 2048 points.
A 2nd set of FOP function codes has been added. This will
prevent interference between the front end alarm block
reads/sets and the console C290 diagnostic program.
GENERAL DESCRIPTION
The CAMAC 290 module provides intelligent interface support for
Fermilab-standard, multiplexed analog to digital converters, MADC's.
Both the older DSE and newer in-house 12-bit and 14-bit MADC versions are
supported. The module will support future MADC's with resolutions up to
16-bits. Timed collection of lists of multiple channels and buffered
collection of single channels is supported.
SUMMARY OF FEATURES
Up to 16 channels of time-stamped recording in any combination of
pre-trigger, post-trigger, or continuous collection mode with elastic
buffering. Performance is limited mainly by the MADC bandwidth. If
the data collection requested exceeds the MADC bandwidth, graceful
degradation will result. Single channel rates to ~90 KHz depending on
MADC conversion rate and operating mode.
Fifteen lists of time-stamped readings of all channels (or a
contiguous subset of channels) collected at a specifiable time.
Alarm monitoring of any data collected in list mode.
Dual-level triggering of all modes (arm and trigger style) utilizing
combinations of external input, coded clock events and programmable
internal rate generators.
Internal decoding of events on the 10 MHz Accelerator Clock.
Data read at the full block transfer rate of the 10 MHz serial CAMAC
link (~285 KW/sec).
Full support for MADC's with up to 128 analog inputs (or two
64-channel units with the addition of external multiplexing hardware).
GENERAL ARM AND SAMPLE TRIGGERS
All data collection performed by the module is tied to hardware events.
Most collection modes make use of an ARMing signal which enables Sample
Triggers. Data is collected on the occurrence of a subsequent Sample Trigger.
This scheme makes possible the use of periodic signals for generating Sample
Triggers without the need for external gating circuitry. A number of general
purpose signals may be selected for use as either Arm Sources or Sample
Triggers. The following are available for unrestricted use as Arm and Sample
Trigger sources:
Any Accelerator clock event. An Arm or Trigger may become active
on the logical OR of one or more Accelerator clock events.
The external input signal from I/O connector.
These are completely general in that any source may be specified as an
Arm Source or Sample Trigger by any combination of plot and list
collection functions without restriction. A given source signal may
be defined as an Arm Source for one or more functions while the same
source signal may be defined as a Sample Trigger for one or more functions.
PLOTS
The module supports data collection for up to 16 "plot channels". Except
for contention to the single ADC unit the operation of all plots is identical.
Logically a plot is a program collecting time-stamped data from a single MADC
input and placing the values in memory for later retrieval over the dataway.
Plot data are always collected as ordered pairs in (time-stamp,reading) format.
Sample Triggers, All Plot Modes
A data point will be gathered for each occurrence of the selected Sample
Trigger. The Sample Trigger source may be programmed to be TCLK clock
event(s), the I/O external signal, or the output of an internal rate
generator. The rate generators operates asynchronous to the accelerator
clock and the power line and may be programmed to any period from 10 uSec
(100 KHz)to .655 seconds (1.52 Hz) with 10 usec resolution. In the case of
a number of plots which together exceed the bandwidth of the MADC, graceful
degradation will result.
Plot Mode A, Continuous Recording
In this mode of operation the program collects one data point on the
occurrence of each Sample Trigger which occurs after the selected ARMing
event and places it in a circular buffer in memory. This buffer will be
large enough to hold at least two seconds of data for collection rates
of 720 Hz or less. The front end processor may read the buffer at any
time and obtain all previously recorded unread data points. A given
data point will only be returned to the front end once for a given plot
channel and retrieval pointer combination. This mode implies that the
front end will empty the accumulated data points in the buffer at an
average rate fast enough to avoid losing any. If the buffer is allowed
to overflow then the oldest data points are overwritten by newer ones.
Data collection is armed on the occurrence of the selected Arm Source.
The Arm Source may be programmed to be any one of the general arm and
trigger signals or "immediate". "Immediate" is considered the time at
which the CAMAC command specifying the Arm Source is received. Until
the selected Arm Source goes active all Sample Triggers will be ignored.
Immediate arming is probably the most useful for this mode. Once armed,
data collection will continue until the plot is stopped by the front
end computer without regard to whether the acquired data is ever read.
Plot Mode B, Post-trigger Recording
Data collection is armed on the occurrence of the selected Arm Source.
The Arm Source may be programmed to be any one of the general arm and
trigger signals or "immediate". "Immediate" is considered the time at
which the CAMAC command specifying the Arm Source is received. Until
the selected Arm Source goes active all Sample Triggers are ignored.
Once the Arm Source has become active the module will collect one data
point on the occurrence of each Sample Trigger and places it in a linear
buffer of user specifiable size (NUM_POINTS) in memory. The host processor
may read the buffer at any time and obtain all the data points recorded up
to that time. The host processor may also at any time reset the data
retrieval pointer in use and thus re-read the data from the beginning
(see F19A5). When NUM_POINTS points have been collected, data collection
stops. Additional Sample Triggers are ignored until the selected Arm
Source once again becomes active. If the Arm Disable option is selected,
then even subsequent Arm Source signals are ignored until the last of the
NUM_POINTS collected points has been read from the buffer. Optionally, a
programmable delay between the Arm Source event and the collection of the
first data point may be specified. This delay is specified in milliseconds.
The plot channel status word (F6A6) may be read to see if the plot is
waiting for an arm, waiting for a delay, collecting data, or inactive.
Plot Mode C, Pre-trigger Recording
This mode of data collection is distinctly different from all other modes.
Upon receipt of the command to collect data, a data point will be
collected on the occurrence of each Sample Trigger and placed in a
circular memory buffer of user specifiable size (NUM_POINTS). This state
will continue until the selected Arm Source goes active. At that time the
module will accept an additional N Sample Triggers (controlled by the
Sample Delay parameter) and then stop. As with the other modes of
operation, the module may be optionally directed not to resume data
collection until a new F17A9 command is written. Operation in mode C
makes very little sense unless this option is always selected (since
there would only be a very brief time during which the front end could
read the collected data). This mode allows a history of readings before
the arming signal to be retained in memory. (Note that a sample delay of
NUM_POINTS is logically equivalent to operation in mode B. In reality,
however, it uses far more of the module's resources than simply selecting
mode B to begin with.) This is a common mode of data collection. The only
thing that is somewhat confusing is the fact that the signal which causes
data collection to (eventually) stop is named "arm". This apparent
contradiction exists only to provide consistency with nomenclature for
all other modes of operation when communicating with the module. As soon
as the arm event happens, any previously recorded data is made available
for reading by the front end processor. The front end processor may also
at any time reset the data retrieval pointer in use and thus re-read the
data from the beginning (see F19A5). It is possible that fewer than the
specified number of points will be collected. This can happen if the arm
event happens before NUM_POINTS - N points are collected. In order to
give the user enough information to figure out what has happened, the
first data point will always contain the time stamp of the arm event and
the offset (in points) from the beginning of the buffer to the first
point collected after the arm event. The plot channel status word (F6A6)
may be read to see if the plot is waiting for an arm, collecting data,
or inactive.
LISTS
The module supports data collection for fifteen "lists". Except for
contention to the single ADC, the operation of all lists is identical.
Logically, a list is a program collecting time-stamped data from
consecutive MADC inputs and placing the data in memory for later
retrieval over the dataway. List data is always collected as ordered
pairs in (time-stamp,reading) format. Like the plots described above,
lists use two signals to coordinate data collection -- they may also
use fewer:
1. A list may be collected immediately on the occurrence of
the selected Arm Source.
2. A list may be collected on the Nth Sample Trigger after a
selected Arm Source.
3. A list may be collected N milliseconds after a selected
Arm Source.
The selected Arm Source may also be specified as "immediate" in which
case options 1 and 2 above are relative to the time the CAMAC command
specifying arm and trigger conditions is received. As with plots,
subsequent Arm events may be optionally ignored until all list data has
been read by the front end. List data acquisition is always interleaved
with any ongoing plot collection.
ALARM MONITORING SYSTEM
Monitoring of list data is supported. Each channel reading of each list
may be monitored independently. MADC values are considered to be signed
two's complement numbers by the alarm monitoring system. Alarm blocks
describing the list, channel, minimum and maximum alarm limits and
other information are downloaded by the front end using a FOP function,
FTC006. The alarm system is reset using the F24A1 function. Each time a
list is collected an alarm scan for that list will be requested. Only
the channels actually collected can be monitored. Alarm blocks for
channels which are not being collected are simply ignored. An alarm
block which is bypassed is considered to be in the good state. For each
alarm transition (good to bad or bad to good) a one word alarm report
message will be placed in a FIFO message buffer and a bit in the LAM
source register will be set. Alarm transitions can result from the alarm
system seeing a change in an MADC channel's value or from the front end
processor downloading a new alarm block. The front end reads the alarm
reports via a dedicated CAMAC function code, F6A5. When the alarm message
buffer is emptied of the last message, the LAM source bit will be cleared.
The format of the alarm message allows it to be used, unmodified, to
perform a single-channel read (F16A0, F1A2 sequence) to obtain the
current reading of the channel from the data list associated with the
alarm.
ALARM BLOCK FORMAT:
Length Symbolic
(bytes) Offset
-------- --------
15 11 8 7 6 0
+-------------------------------+
2 ABCHAN |x|x|x|x| List# |x| Channel # |
|-------------------------------|
2 ABFLAG | | | |H|L| | | | | | | | | |G|B|
|x|x|x|I|O|x|x|x|x|x|x|x|x|x|B|P|
|-------------------------------|
2 ABMIN | minimum value |
|-------------------------------|
2 ABMAX | maximum value |
|-------------------------------|
2 ABHYST | tries_needed | tries_now |
+-------------------------------+
HI Set if reading is too high.
LO Set if reading is too low.
GB alarm state good (0) or bad(1)
BP alarm bypassed (bit value of 0) and will not generate alarms
x unused bit, will be remembered by the module
Tries_needed and tries_now are unsigned bytes that are used to provide
alarm hysteresis. The alarm system must detect a channel reading to be
in the other state (bad or good) "tries_needed" consecutive alarm scans
before it will change the good/bad bit and output an alarm message.
A tries_needed value of zero will behave the same as a value of one.
Tries_now is an internal counter used to keep track of the number of
consecutive scans in the other state.
ALARM REPORT FORMAT:
15 11 8 7 6 0
+-------------------------------+
|G| |H|L| List# | | Channel # |
|B|x|I|O| (1-15)|x| (0-127) |
+-------------------------------+
GB alarm state good (0) or bad(1)
HI Set if reading is too high.
LO Set if reading is too low.
TIME STAMPS
In order to properly position collected data in time the module always
collects a time-stamp with every data point. The time-stamp count rate
is derived from the accelerator clock and is 10 KHz. This periodic
signal is counted by a 16-bit counter which can be read by module
firmware. In order to provide global synchronization the counter is
reset by clock event 02, which occurs every 5 seconds.
Sixteen bits of time-stamp count are always read whenever a time-stamp
is collected. The resulting 32-bit longword representing a (time-stamp,
data) pair as it would appear in VAX memory is shown below.
second word returned first returned word
+----------------------------------------------------------+
| signed | 16 bits of |
| MADC data | time-stamp reading |
+----------------------------------------------------------+
31 16 15 0
PROGRAMMING CONSIDERATIONS
THIS IS IMPORTANT! Programmers who must communicate directly with the
290 module should thoroughly understand the two I/O rules stated below.
Those readers not having to communicate directly with the 290 module
may wish to skip the section.
Writing Data To The Module
Rule 1
A write operation must be retried until the module
returns a valid Q response.
If the module is idle at the time the command arrives, Q will be
returned and the module will begin processing the command in a few
microseconds. If the module is busy with some non-CAMAC chore at the
time the write command arrives, then Q will be returned and the
command and data stored in a one-deep buffer. The module will begin
processing the command as soon as possible. If the module has not
begun processing the buffered command and data by the time yet another
write command arrives, then ~Q will be returned. In such a case this
last write command must be re-transmitted periodically (at some
convenient rate). Note that Accelerator Division CAMAC hardware has
been designed with Q-retry hardware for this very purpose. For
purposes of communication, the control functions F24 and F26 are
treated as data write commands.
Reading Data From The Module
Rule 2
A read operation must be retried until a valid Q
response is returned.
A read operation (on a function code different from the last) will
always return at least one ~Q response. This is because the module
cannot respond with the requested data in the 200 nanoseconds required
by the CAMAC dataway protocol. In the best of cases (module is idle at
time read request arrives) a few microseconds are required to return
data. If the module is busy with data collection or other work then
the read request will not be processed as quickly. Also, the F0 read
functions require the module to initialize a DMA channel. This
requires additional time (though once set up the DMA is fairly rapid).
Note that both the plot and list data collection mechanisms always
make data available to be read via the F0 function codes in multiples
of 2 words.
FUNCTION CODES AND DATA FORMATS
F0A1 - Read list data
Read list data in (TimeStamp, Reading) format. The list number and the
retrieval pointer are specified by the most recent F19A6 function. The
time stamp is returned in the first word and the MADC data in the second word.
F0A9 - Read plot data
Read plot data in (TimeStamp, Reading) format. The plot channel number and
the retrieval pointer are specified by the most recent F19A5 function. The
time stamp is returned in the first word and the MADC data in the second word.
F1A0 - Read LAM source
Read 16-bit LAM source register. This allows the front end to determine the
source of all service requests in the module with a single read operation.
Additional status is available on other function codes.
The register is organized as follows:
+---------------------------------------------------------------+
| A | | | | | | | | | | | | | | | R |
| R | X | X | X | X | X | X | X | X | X | X | X | X | X | X | S |
+---------------------------------------------------------------+
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
AR Indicates, when set, that there are Alarm Reports waiting
RS Indicates, when set, that the module has been reset.
The source of the reset may have been the front panel
switch, the front end processor via the dataway (F9A0 or
explicitly requested Z-cycle to the crate controller) or
the internal power-up sequence. This bit is reset by FOP
typecode 9.
F1A1 - Read LAM Mask Register
Bit definitions are identical to the LAM source register. A bit which is
set in the mask register will permit generation of a module LAM due to
that LAM source. Other bits will not generate LAM. The state of the bit
as read by the F1A0 function is not affected. (In a polling application
all bits might be masked off but the status is still accurately tested
by reading the LAM source.) In applications using a Tevatron serial CAMAC
crate controller (TSCC) it is also possible to poll the concentrated LAM
status from the crate controller. At module reset, the LAM mask register
is initialized to FFFF (hex).
F1A2 - Read Single Channel Data
The module will return the data requested by the previous F16A0 command.
A time-stamp is never returned on this function code (see F1A3). If list
#0 was specified by the F16A0 command then the selected channel will be
digitized and the 16-bit left-justified result will be returned to the
front end. On first occurrence ~Q will be returned, it is necessary to
retry the operation (without any intervening commands to other function
codes) until a valid Q response is returned. After a Q response, the
module will point to the next (sequential) channel if the autoincrement
feature was not suppressed in the F16A0 command. The next channel will
not actually be digitized unless another F1A2 function is executed. At
that time another ~Q will be returned and retries will be needed. This
is different than all other read functions F1A2's for lists 1 to 15,
which prefetch the next data word to be returned.
If the list number in the last F16A0 command was in the range 1 to 15 then
the module will attempt to return the requested channel reading at the
time that list was last collected. If the collection parameters for the
list do not include the requested channel then ~Q will be returned
(perpetually). Also, the specified list of channels must actually have
been collected at some previous time. Otherwise, ~Q will be returned
until such time as the list in question is actually collected.
F1A3 - Read Single Channel Time Stamp
The module returns the 16-bit time stamp associated with the data returned
by the last single channel read to F1A2. It is correct whether the reading
was from a list in memory or a digitize (list #0). The readout is
non-destructive, subsequent reads will return the same value (until after
another F1A2 is issued).
F2A1 - Read Active Lists
The module returns a 16-bit value. Each bit of this value is used to indicate
whether a particular list is active, i.e., in use. The bit with place value
2**n indicates the status of list n+1. (There is no list zero.) A set bit
indicates the corresponding list is active.
F2A2 - Read Active Plots
The module returns a 16-bit value. Each bit of this value is used to indicate
whether a particular plot is active, i.e., in use. The bit with place value
2**n indicates the status of plot n+1. (There is no plot zero.) A set bit
indicates the corresponding plot is active.
F1A4 - Read List Setup Status
Status from the most recent F17A1 is returned. Zero implies success. A
Facility 15 ACNET standard error code is returned in case of a failure.
F1A5 - Read Plot Setup Status
Status from the most recent F17A9 is returned. Zero implies success. A
Facility 15 ACNET standard error code is returned in case of a failure.
F6A0 - Read Module ID
The module will return its assigned identification number, 290 (decimal)
0122 (hex).
F6A1 - Read Firmware Version Number
A 16-bit value is returned to the requestor. The major version number
(release) is in the most significant byte. The minor version number, or
modification level, is returned in the least significant byte. By
convention these two values are displayed in a (pseudo) floating point
format with each byte displayed in radix 10 separated only by a decimal
point. For example a most significant byte of value 1 and a least
significant byte of value 17 would be displayed as '1.17'. The module
guarantees that both bytes will always be in the range 0-99 (decimal).
F6A2 - Read Module Configuration/status
Read 16-bit module configuration/status word.
+------------------------------------------------+
| not | L| L| |C| CVT |
| defined | E| C| |P| |
+------------------------------------------------+
15 12 11 10 9 8 7 0
LE LAM is currently enabled
LC MADC is currently in Local Control mode
CP TCLK Clock is present
CVT MADC conversion time (in microseconds) averaged over 20
samples at module initialization. If the MADC is in LOCAL at
the time the module is initialized, then this value is set
to FF (hex).
F6A3 - read status see FOP codes
F6A4 - read data see FOP codes
F6A5 - Read alarm messages
Read Alarm Report messages from the module's alarm system. The messages
are one word long. This word may be passed unaltered back to F16A0 in
order to set up a read of the list data which generated the alarm message.
The data would then be read on F1A2.
F6A6 - Read Plot Channel Status
Read plot channel status. Two bits of status are reported for the plot channel specified in the most recent F16A10 function.
+--------------------------------------------------+
| not | PCS |
| defined | |
+--------------------------------------------------+
15 2 1 0
PCS Plot channel state:
0= plot channel inactive (data collection cancelled OR data
collection finished in plot mode B or C)
1= waiting for arm event
2= waiting for time delay (plot mode B only).
3= data collection in progress and previously collected data
is available for readout.
F6A7 - Hardware Diagnostics Read
This function, in conjunction with F16A15, provides a read function of
programmable speed, which returns known data. After the execution of an
F16A15 function, F6A7 will return zero and increment on each successive
execution. The data sent to F16A15 determines how long it takes to
execute future F6A7's.
F6A8 - read status see FOP codes
F6A9 - read data see FOP codes
F8A0 - Test Module LAM
The Q response indicates whether the module is requesting LAM (Q=true)
or not (Q=false). This function is implemented entirely in hardware
and does not interrupt the embedded processor. Consequently, ~Q retries
are not required. A single access always returns the proper status.
Note that the returned status is completely unaffected by the state of
the module's LAM enable gate. It is possible for this function to return
Q (LAM pending) even though a LAM request to the crate controller has
not been asserted.
F9A0 - Reset Module
This function always returns Q. This function is implemented entirely in
hardware and is equivalent to pressing the reset button on the module
front panel. Among other things it causes the embedded processors to be
reset. The ensuing program initialization may require milliseconds to
prepare the module for communication with the outside world. Attempts at
communication before the reset sequence is complete will result in ~Q.
F16A0 - Select Channel For Read
Write channel number and list number for subsequent single channel reads.
The module accepts a 16-bit data word from the dataway. It controls the
operation of the module when subsequent single channel read commands are
received (F1A2). It is of the form:
+------------------------------------------------+
|N| | List # | | selected channel # |
|I| x | x | x | (0-15) |x| (0-127) |
+------------------------------------------------+
15 14 13 12 11 8 7 6 0
Bit # Definition
x contents ignored
15 NI, when set specifies that the selected channel value is not
auto-incremented after each conversion. If clear, the channel
number will increment after each F1A2 read (up to 127 and
then wrap-around to channel zero).
List numbers 1 to 15 refer to data collected for lists 1 to 15.
Specifying a list number of zero will cause the selected channel to
be digitized on receipt of a subsequent F1A2 read.
F16A1 - Select List Channel Range
Writes starting and ending MADC channel numbers for subsequent list data
collection. The list number is specified by the most recent F16A2 function.
The specified starting channel must be less than or equal to the ending
channel (no wrap-around). The indicated bit positions should be coded as zero.
+-----------------------------------------------+
| | ending channel # | | starting channel # |
|0| (0-127) |0| (0-127) |
+-----------------------------------------------+
15 8 7 0
The channel numbers must be in the range 0-127 for the 290 module.
F16A2 - Write List Setup Number
Write the list number for subsequent list setup commands. List setup
commands are F1A4, F16A1, F17A1, F17A2, F18A1, and F18A2.
F16A9 - Select Channel for Plot
Writes the selected MADC channel number for subsequent plot data collection.
The plot channel number is specified by the most recent F16A10 function.
Unused bit positions should be coded as zero.
+-----------------------------------------------+
| |D| channel # |
| undefined |I| (0-127) |
+-----------------------------------------------+
15 7 6 0
DI Diagnostics flag. If zero, normal MADC data collection is
used. If set, fake plot data will be generated within the
module as follows:
If channel # <= 63, the time stamps start at 0, increment by
channel*4, and never reset.
When channel # >= 64, real time stamps are returned. DATA = 1's
complement of time stamp for both cases.
F16A10 - Select a Plot Channel
Write the plot channel number for subsequent plot setup commands. Plot
setup commands are F1A5, F6A6, F16A9, F16A11, F17A9, F17A10, F18A9, F18A10,
and F19A9.
F16A11 - Select Plot Buffer Size
Write the number of data points to be collected in a plot mode B or plot
mode C plot (NUM_POINTS). The maximum allowable value is 2048 points. The
plot channel number is specified by the most recent F16A10 function.
F16A15 - Initialize Hardware Diagnostics Read
This function, in conjunction with F6A7, provides a read function of
programmable speed, which returns known data. After the execution of an
F16A15 function, F6A7 will return zero and increment on each successive
execution. The data sent to F16A15 determines how long it takes to
execute future F6A7's.
F17A1 and F17A9 - Select Arm And Trigger
Write the arm and trigger selection word for collection of a list (F17A1)
or the collection of a plot channel (F17A9). This should be the last
function issued when setting up data acquisition. Undefined fields are
reserved for future enhancements and must be coded as zeros. The list
or plot channel number is specified by the most recent F16A2 or F16A10
function.
+------------------------------------------------+
| | T |A| P | | A |
| | S |D| M | | S |
+------------------------------------------------+
15 10 9 8 7 6 5 4 2 1 0
AS Arm Source (enable Sample Triggers)
0= cancel data acquisition
1= arm immediately
2= arm on clock event(s)
3= arm on external source
PM Plot mode (0=undefined 1=mode_A 2=mode_B 3=mode_C)
ignored for list collection
1= continuous digitize after specified arm
2= digitize NUM__POINTS points N milliseconds after arm
where 0 <= N <= 65535 (N written by F18An)
3= begin continuous digitize and stop N Sample Triggers
after arm where 0 <= N < NUM__POINTS
(N written by F18A9, NUM__POINTS written by F16A11)
AD Arm disable. If zero, then data collection will be
re-armed after a complete list or plot buffer has been
collected and the specified arm source becomes active. If
set then the selected arm source will be ignored until
after all available data has been read by the front end (or
new trigger select word is written on this function code).
TS Sample Trigger source
0= trigger sample collection on internal timer
fixed asynchronous 1 KHz for lists
independently variable asynchronous rate for plots
1= trigger immediately (lists only)
2= trigger sample collection on clock event(s)
3= trigger sample collection on external source
F17A2 - Write List Sample Trigger
Sends one list Sample Trigger clock event (in the low byte) to the module.
During list setup, any clock events sent via F17A2 after the F16A2 function
and before the F17A1 function are used as list Sample Trigger events. If
F17A1 specifies "clock event" for the Sample Trigger source, the list will
be collected on the logical OR of these clock events.
F17A10 - Write Plot Sample Trigger
Sends one plot Sample Trigger clock event (in the low byte) to the module.
During plot setup, any clock events sent via F17A10 after the F16A10
function and before the F17A9 function are used as plot Sample Trigger
events. If F17A9 specifies "clock event" for the Sample Trigger source,
the plot will be collected on the logical OR of these clock events.
F18A1 - Select List Arm Delay
Write the arm delay value for list acquisition. The list number is
specified by the most recent F16A2 function. An unsigned 16-bit data
word is accepted from the front end and causes the module to ignore N
triggers from the selected trigger source following an ARM before
collecting a list. A value of zero will direct the module to collect
the corresponding list on the first occurrence of the selected trigger
after being armed. If trigger source zero (internal timer) has been
selected then a fixed asynchronous 1 KHz source will provide triggers
for the delay count. Trigger source 1 (immediate) causes the delay
count to be ignored.
F18A2 - Write List Arm Clock Event
Sends one list Arm clock event (in the low byte) to the module. During
list setup, any clock events sent via F18A2 after the F16A2 function and
before the F17A1 function are used as list Arm events. If F17A1 specifies
"clock event" for the Arm source, the list will be armed on the logical
OR of these clock events.
F18A9 - Select Plot Arm Delay
Write the arm delay value for plot data acquisition. The plot channel
number is specified by the most recent F16A10 function. The supplied
value should fall within the ranges specified in the F17A9 description
(above) to avoid unpredictable behavior.
Plot
Mode Definition
A Delay count is ignored for this mode of data collection.
B The supplied value may be in the range 0 <= N <= 65535 and
will cause a delay of N milliseconds when the arming input
goes active until the first data point is collected.
C The supplied value should be in the range 0 <= N <
NUM_POINTS and sets the number of additional sample
triggers which will be accepted after the selected arming
source goes active.
F18A10 - Write Plot Arm Clock Event
Sends one plot Arm clock event (in the low byte) to the module. During plot
setup, any clock events sent via F18A10 after the F16A10 function and
before the F17A9 function are used as plot Arm events. If F17A9 specifies
"clock event" for the Arm source, the plot will be armed on the logical OR
of these clock events.
F19A0 - Write LAM Mask Register
The contents of the LAM mask register are ANDed with the contents of the
LAM source register whenever there is a change in the LAM source register
status. If the result is non-zero and the module LAM is enabled then LAM
is asserted.
F19A2 - Write command see FOP codes
F19A3 - Write data see FOP codes
F19A5 - Select Plot For Read
Select a plot channel and a data retrieval pointer for reading.
There are 16 data retrieval pointers numbered 0 to 15 for each plot
channel. This function selects which retrieval pointer will be used by
the next F0A9 function code for the specified plot channel. The main use
for multiple pointers is so that a plot channel running a continuous plot
(plot mode A) can be read out multiple times for multiple users.
In addition, when the RS bit is set, this function resets the specified
retrieval pointer for the plot channel. For plot modes B and C, the
retrieval pointer is reset to point to the first data point. For plot
mode A, the retrieval pointer is reset to point to the next data point
that will be collected. Resetting a retrieval pointer may be used for
re-reading a snapshot (plot mode B or C) or for throwing away unwanted
data for plot mode A.
+-----------------------------------------------+
|R| | Pointer | Plot Channel Number |
|S| | ID (0-15) | |
+-----------------------------------------------+
15 11 8 7 0
F19A6 - Select List For Read
Select a list and a data retrieval pointer for reading
There are 16 data retrieval pointers numbered 0 to 15 for each list. This
function selects which retrieval pointer will be used by the next F0A1
function code for the specified list. In addition, when the RS bit is set,
this function resets the specified retrieval pointer for the list. The
retrieval pointer is reset to point to the first collected channel.
Resetting a retrieval pointer may be used for re-reading the list.
+-----------------------------------------------+
|R| | Pointer | List Number (1-15) |
|S| | ID (0-15) | |
+-----------------------------------------------+
15 11 8 7 0
F19A7 - Write command see FOP codes
F19A8 - Write data see FOP codes
F19A9 - Write Plot Sample Period
This function code sets the plot sample rate when internal timing is
specified as a trigger source. The 16-bit word written by the front end
is treated as an unsigned integer where the least significant bit
represents 10 microseconds.
F24A0 - Disable LAM
This is a control function. It inhibits the module from asserting LAM.
It does not reset any pending LAM status. The module status may still be
obtained by reading the LAM status register. (At module reset, LAM is enabled.)
F24A1 - Reset Alarm System
Reset alarm system. The good/bad bits in all alarm blocks are set to the
good state (cleared), the tries_now counts in all alarm blocks are set to
zero, and the alarm queue is emptied of all messages.
F26A0 - Enable Module LAM
This is a control function. It allows the module to assert LAM when the
logical AND of the LAM source register and the LAM mask register is non-zero.
(At module reset, LAM is enabled.)
DIAGNOSTIC PROTOCOL, FOP
FOP is the CAMAC 190 family Fast On-line Protocol. Its purpose is to provide
a typecode-oriented communication scheme for infrequently used module
functions. This allows the frequently used features to make full use of
dedicated function code and subaddress combinations. FOP is primarily
intended for use by diagnostic and debugging programs and is not an attempt
to provide a general purpose communication protocol. FOP communication uses
either of two sets of four function codes as described below. Not every
transaction requires the use of all four function codes. In fact, most do
not. Two sets are provided so that two programs can do FOP commands without
interfering with each other. Each FOP user should use just one of the FOP
command sets.
The following functions are used to speak FOP:
F19A2 - write FOP-1 command
F19A3 - write FOP-1 data
F6A3 - read FOP-1 status
F6A4 - read FOP-1 data
F19A7 - write FOP-2 command
F19A8 - write FOP-2 data
F6A8 - read FOP-2 status
F6A9 - read FOP-2 data
F19A2 or F19A7 - Write FOP Command
This function is used to begin and/or end a command to the module's
typecode processor.
+-----------------------------------------------+
|S|X| | |
|N|E| reserved | Typecode (TC) |
|M|Q| | |
+-----------------------------------------------+
15 8 7 0
SNM Start receiving new message on F19A3 (or F19A8). Current
contents of the received message buffer are lost (buffer
read pointer is reset)
XEQ End of message to module, execute requested action with data
supplied on F19A3 (or F19A8) (if any)
TC 8-bit command code (1-255). Other typecodes are
implementation-specific and are assigned by the module
programmer. The same typecode should be specified on both
the SNM and XEQ transmissions.
Note that if the SNM and XEQ bits are both set then there is no message
data to be transmitted on F19A3 (or F19A8), all meaning is implicit in the
typecode itself and execution of the typecode handler will begin immediately.
In this case all data previously transmitted via F19A3 (or F19A8) are lost.
Status returns:
0 success
-1 Ambiguous command, neither start nor stop
-2 Undefined typecode
F19A3 or F19A8 - Write FOP Data
Up to 256 words of 16-bit data will be accepted on this function code
following a FOP command to start a new message (SNM) on F19A2 (or F19A7).
These data will be placed in a temporary buffer and are available to the
typecode handler routine when an execute command (XEQ) is received on
F19A2 (or F19A7).
Status returns:
-1 indicates buffer overflow
F6A3 or F6A8 - Read FOP Status Word
+-----------------------------------------------+
| STAT | typecode |
| | (TC) |
+-----------------------------------------------+
15 8 7 0
TC 8-bit typecode with which the status in the high byte is
associated.
0 implies status is from last command transmission on F19A2
(or F19A7).
STAT is specific to the typecode indicated in the low byte. It is treated
as a signed byte with the following conventions:
>0 partial or qualified success
=0 success
<0 error
F6A4 or F6A9 - Read FOP Reply Data
Read typecode-specific data to be returned to the front end. The amount
of data which is available is also typecode-specific. It may be implicit
for the typecode or it may have been specified by the front end in a
preceding command and data transmission sequence. The familiar ~Q retry
procedure is required in any case.
FOP codes supported by the 290
typecode 1
the previously transmitted command data is returned for testing purposes
example
F19A2 with typecode 1 and SNM and XEQ both set to start and end a command
sequence (CAMAC data is saved in FOP buffer)
F6A4 to read back the CAMAC data which was just sent and saved in the
FOP buffer
typecode 3
not supported
typecode 4
send a 32 bit ptr to 290 and a buffer length in words (2 bytes) for a
memory dump
example
F19A2 with typecode 4 and SNM
F19A3 with ptr ls word (2 bytes)
F19A3 with ptr ms word (2 bytes)
F19A3 with buffer length in words (2 bytes)
F19A2 with typecode 4 and XEQ
F6A4 per word of returned data with ls words returned first, then ms words
typecode 5
not supported
typecode 6
write an alarm block to the 290 (see 290 specs for structure details)
example
F19A2 with typecode 6 and SNM
F19A3 5 times with alarm block data
F19A2 with typecode 6 and XEQ
typecode 7
read an alarm block from the 290 (see 290 specs for structure details)
example
F19A2 with typecode 7 and SNM
F19A3 1 time with list and channel infor (see 290 spec for details)
F19A2 with typecode 7 and XEQ
F6A4 5 times to return the alarm block data
typecode 9
clear the i've been reset bit
example
F19A2 with typecode 9 and SNM and XEQ
typecode 16 (10)H
read back the list data for the respective channel
typedef struct
{
int dispatch_id;
int list_number;
MADC_POINT * list_points_buffer_ptr;
/* **reset on F17A1 cancel only */
int channel_range_start;
int channel_range_end;
int add_trigger_here;
int add_arm_here;
int trigger_clock_events[NUMBER_CLOCK_EVENTS];
int arm_clock_events[NUMBER_CLOCK_EVENTS];
int arm_delay;
int list_collected_flag;
/* **reset on any F17A1 */
TIMING_CALLBACK_BLOCK * deregister_link_head;
int list_setup_status;
int arm_source;
int arm_disable;
int trigger_source;
int current_read_channel;
int current_retrieval_index;
int data_retrieval_index[MAX_RETRIEVAL_PTRS];
int read_already_done[MAX_RETRIEVAL_PTRS];
int data_valid_flag;
int delay_count_down;
int read_adc_state;
int dma_read_state;
int list_current_state;
} LIST_OBJECT_DATA;
example
F19A2 with typecode 16 and SNM
F19A3 with list number
F19A2 with typecode 16 and XEQ
F6A4 sizeof(LIST_OBJECT_DATA)/2 times to return the data
typecode 17 (11)H
read back the plot data for the respective plot channel
typedef struct
{
int dispatch_id;
TIMING_CALLBACK_BLOCK * deregister_list_head; /* keep a list so we can
quickly deregister requests
with timing objects */
int plot_number; /* initialize at p_c object
construction */
int current_plot_mode;
MADC_POINT *points_buffer_ptr; /* if static, initialize at
p_c object construction */
int buffer_length; /* if static, initialize at
p_c object construction */
int diagnostics_flag;
int plot_setup_status;
MODE_DATA *mode_data_ptr; /* initialize at p_c object
construction */
/* reset after a F17A9 cancel */
int diagnostic_time_stamp_counter;
int madc_channel;
int arm_delay;
int sample_period;
int add_trigger_here;
int add_arm_here;
int trigger_clock_events[NUMBER_CLOCK_EVENTS];
int arm_clock_events[NUMBER_CLOCK_EVENTS];
} PLOT_CHANNEL_DATA;
example
F19A2 with typecode 17 and SNM
F19A3 with desired plot number
F19A2 with typecode 17 and XEQ
F6A4 sizeof(PLOT_CHANNEL_DATA)/2 times to return the data
typecode 18 (12)H
read back the mode channel data for the respective plot channel
/* mode A object private data */
/* note: all mode data is completely reset on any F17A9 */
typedef struct
{
/* external variables, controlled from outside */
void *pc_data_ptr;
int current_retrieval_index;
int arm_source;
int trigger_source;
/*** internal variables ***/
int data_retrieval_index[MAX_RETRIEVAL_PTRS];
int write_index;
int pc_state;
int read_adc_state;
int dma_return_state;
} MODE_A_DATA;
/* mode B object private data */
/* note: all mode data is completely reset on any F17A9 */
typedef struct
{
/* external variables, controlled from outside */
void *pc_data_ptr;
int current_retrieval_index;
int arm_source;
int arm_disable_flag;
int trigger_source;
/*** internal variables ***/
int block_mode_flag;
int delay_countdown;
int data_retrieval_index[MAX_RETRIEVAL_PTRS];
int read_already_done[MAX_RETRIEVAL_PTRS];
int write_index;
int wrap_around_flag;
int data_valid_flag; /* indicates can read data if arm disable = false */
int pc_state;
int read_adc_state;
int dma_return_state;
} MODE_B_DATA;
/* mode C object private data*/
/* note: all mode data is completely reset on any F17A9 */
typedef struct
{
/* external variables, controlled from the outside */
void *pc_data_ptr;
int current_retrieval_index;
int arm_source;
int arm_disable_flag;
int trigger_source;
/*** internal variables ***/
int dma_return_state;
int trigger_delay_counter;
int data_retrieval_index[MAX_RETRIEVAL_PTRS]; /* (linearized offset) */
int read_already_done[MAX_RETRIEVAL_PTRS];
int write_index;
int arm_occurred_timestamp;
int buffer_read_start; /* where we will start reading out of our
buffer (linearized offset = 0) */
int buffer_read_end; /* where we will stop reading out of our buffer */
int linearized_offset; /* the offset requested by the spec */
int pc_state;
int wrap_around_flag;
} MODE_C_DATA;
/* mode data union containing all 3 mode data structures */
typedef union
{
MODE_A_DATA mode_a_data;
MODE_B_DATA mode_b_data;
MODE_C_DATA mode_c_data;
} MODE_DATA;
example
F19A2 with typecode 18 and SNM
F19A3 with desired plot channel
F19A2 with typecode 18 and XEQ
F6A4 sizeof(MODE_DATA)/2 times to return mode data. note: if plot mode is
already known, you can use specific MODE_X_DATA
typecode 19 (13)H
read back the list manager data
typedef struct
{
int write_list_number;
int read_list_number;
} LIST_MANAGER_DATA;
example
F19A2 with typecode 19 and SNM and XEQ
F6A4 sizeof(LIST_MANAGER_DATA)/2 times to return data
typecode 20 (14)H
read back the single point data
typedef struct
{
int dispatch_id;
int list_number;
int channel_number;
int not_increment_flag;
int current_state;
short associated_time_stamp; /* save time stamp for a possible F1A3 */
MADC_POINT list_0_point;
TIMING_CALLBACK_BLOCK * deregister_link_head;
} SINGLE_POINT_DATA;
example
F19A2 with typecode 20 and SNM and XEQ
F6A4 sizeof(SINGLE_POINT_DATA)/2 times to return the data
typecode 21 (15)H
read back the plot manager data
typedef struct
{
int read_plot_channel; /* read commands go to this plot channel */
int write_plot_channel; /* write commands go to this plot channel */
} PLOT_MANAGER;
example
F19A2 with typecode 21 and SNM and XEQ
F6A4 sizeof(PLOT_MANAGER)/2 times to return the data
typecode 22 (16)H
read back the timing pool data
int timing_pool_head;
int timing_pool_tail;
int timing_pool_entries_used;
example
F19A2 with typecode 22 and SNM and XEQ
F6A4 6 times to return the data with ls words always returned first
typecode 23 (17)H
read back the timers used table
int timers_used_table[NUMBER_OF_TIMERS];
example
F19A2 with typecode 23 and SNM and XEQ
F6A4 NUMBER_OF_TIMERS*2 times to return data (currently 16)
typecode 24 (18)H
read back the timer trigger heads table
TIMING_CALLBACK_BLOCK * timer_trigger_heads[NUMBER_OF_TIMERS];
example
F19A2 with typecode 24 and SNM and XEQ
F6A4 sizeof(TIMING_CALLBACK_BLOCK *)*NUMBER_OF_TIMERS/2 times to return data
typecode 25 (19)H
not supported - read back the respective timer list
must be done manually using typecode 24 and typecode 4 to do a manual walk
of the respective list
typedef struct TIMING_CALLBACK_BLOCK
{
struct TIMING_CALLBACK_BLOCK * next;
struct TIMING_CALLBACK_BLOCK * previous;
struct TIMING_CALLBACK_BLOCK * next_deregister;
int (*callback_function_ptr)(void *parameter_ptr);
void * parameter_ptr;
int block_id_number;
int timer_event_external_number;
/* this block can be for internal timer, tclk event or external source */
int trigger_type;
} TIMING_CALLBACK_BLOCK;
typecode 26 (1A)H
read back the event triggers head table, events 0-127
TIMING_CALLBACK_BLOCK * event_trigger_heads[NUMBER_OF_EVENTS];
example
F19A2 with typecode 26 and SNM and XEQ
F6A4 sizeof(TIMING_CALLBACK_BLOCK *)*NUMBER_OF_EVENTS/2/2 times to return
the data (currently number of events is 256)
typecode 27 (1B)H
read back the event triggers head table, events 128-255
TIMING_CALLBACK_BLOCK * event_trigger_heads[NUMBER_OF_EVENTS];
example
F19A2 with typecode 27 and SNM and XEQ
F6A4 sizeof(TIMING_CALLBACK_BLOCK *)*NUMBER_OF_EVENTS/2/2 times to return
the data (currently number of events is 256)
typecode 28 (1C)H
not supported - read back the respective timer list
must be done manually using typecode 26-27 and typecode 4 to do a manual
walk of the respective list
typedef struct TIMING_CALLBACK_BLOCK
{
struct TIMING_CALLBACK_BLOCK * next;
struct TIMING_CALLBACK_BLOCK * previous;
struct TIMING_CALLBACK_BLOCK * next_deregister;
int (*callback_function_ptr)(void *parameter_ptr);
void * parameter_ptr;
int block_id_number;
int timer_event_external_number;
/* this block can be for internal timer, tclk event or external source */
int trigger_type;
} TIMING_CALLBACK_BLOCK;
typecode 29 (1D)H
read back the return data request
typedef struct
{
int write_index; /* plot write_index is based on points, so this is *2 */
int buffer_read_ptr; /* change read out index in dma return */
int buffer_length; /* needs to know wrap around point */
int partial_buffer_flag; /* will this buffer be the last one? */
int total_bytes_xfered; /* bytes xfered by dma, returned to caller */
short *points_buffer_ptr;
void *object_data_ptr;
int (*inactive_callback_ptr)(void *parameter_ptr);
int (*need_points_callback_ptr)(void * parameter_ptr);
} RETURN_DATA_REQUEST;
example
F19A2 with typecode 29 and SNM and XEQ
F6A4 sizof(RETURN_DATA_REQUEST)/2 times to return the data
typecode 30 (1E)H
read back the dma setup
typedef struct
{
int byte_count;
void * source_address;
int current_state;
int dma_returned_byte_count;
} DMA_SETUP;
example
F19A2 with typecode 30 and SNM and XEQ
F6A4 sizeof(DMA_SETUP)/2 times to return the data
typecode 31 (1F)H
read back the read madc request data for the respective resource number
typedef struct READ_MADC_REQUEST
{
int block_read_flag; /* indicate which union field to use */
int madc_channel; /* MADC channel # (plot mode only) */
void *call_back_ptr; /* call back requesting object when read is done */
void *object_data_ptr;/* need to know which instatnce did request */
int dispatch_id; /* need to keep track of 290 resource number */
MADC_POINT *points_buffer_ptr; /* tell read madc where the buffer is */
int read_active_flag; /* used by calling object to tell if this request
is active, if already active do not send new
request */
/* block reads only use from here down in the structure */
int buffer_length; /* length of the buffer */
int block_timing; /* value to reset block_mode_timer to */
int last; /* last point or channel to read */
/* note: for plots, last is the non linearized
offset of the last point. for lists last is the non
linearized offset of where the last channel goes */
int auto_stop_flag; /* set = read then stop, clear = circular buffer */
int current_channel; /* used by lists, set in calling object to 1st
channel and incremented in adc object
Note: in lists, 1st channel + last should = ending
channel */
int plot_or_list_flag;/* indicate if this resource is for a plot or a list */
int *wrap_around_flag_ptr; /* read_madc will set in block mode */
/* variables used internally by read madc object but kept here for
convenience */
struct READ_MADC_REQUEST * next_active_block; /* ptr for active block list */
struct READ_MADC_REQUEST * previous_active_block; /* ptr for active block
list */
int read_madc_write_index;
int do_digitize_flag; /* used by read madc to tell if this request
should be digitized or skipped */
int block_mode_timer; /* decrement every interrupt to maintain block
mode timing via how fast adc turns around
conversions */
} READ_MADC_REQUEST;
example
F19A2 with typecode 31 and SNM
F19A3 with the desired resource number
F19A2 with typecode 31 and XEQ
F6A4 sizeof(READ_MADC_REQUEST)/2 times to return the data
typecode 32 (20)H
read back the adc data
typedef struct
{
int A_NOT_B; /* indicates current buffer getting dma points */
int need_to_read; /* indicates which buffers need to be read */
int who_to_read_first;/* indicates which buffer needs to be read first */
unsigned short dma_data_A[DATA_POINT_BUFFER_SIZE]; /* buffer A */
unsigned short dma_data_B[DATA_POINT_BUFFER_SIZE]; /* buffer B */
unsigned short dma_timestamps_A[DATA_POINT_BUFFER_SIZE]; /* buffer A */
unsigned short dma_timestamps_B[DATA_POINT_BUFFER_SIZE]; /* buffer B */
WAITING_ELEMENT waiting_queue[WAITING_QUEUE_SIZE];
int waiting_head;
int waiting_tail;
int waiting_count;
int block_counter; /* number of currently active block reads */
READ_MADC_REQUEST * scanner_ptr;/* used in scanning block reads into fifo */
int read_madc_current_state;
READ_MADC_REQUEST * active_block_head;
} ADC_DATA; /* adc private data structure */
example
F19A2 with typecode 32 and SNM and XEQ
F6A4 sizeof(ADC_DATA)/2 times to return the data
typecode 33 (21)H
not supported - read back the adc block list
must be done manually using typecode 32 and typecode 4 to do a manual
walk of the respective list
typedef struct READ_MADC_REQUEST
{
int block_read_flag; /* indicate which union field to use */
int madc_channel; /* MADC channel # (plot mode only) */
void *call_back_ptr; /* call back requesting object when read is done */
void *object_data_ptr;/* need to know which instatnce did request */
int dispatch_id; /* need to keep track of 290 resource number */
MADC_POINT *points_buffer_ptr; /* tell read madc where the buffer is */
int read_active_flag; /* used by calling object to tell if this request
is active, if already active do not send new request */
/* block reads only use from here down in the structure */
int buffer_length; /* length of the buffer */
int block_timing; /* value to reset block_mode_timer to */
int last; /* last point or channel to read */
/* note: for plots, last is the non linearized
offset of the last point. for lists last is the non
linearized offset of where the last channel goes */
int auto_stop_flag; /* set = read then stop, clear = circular buffer */
int current_channel; /* used by lists, set in calling object to 1st channel
and incremented in adc object
note: in lists, 1st channel + last should = ending
channel */
int plot_or_list_flag;/* indicate if this resource is for a plot or a list */
int *wrap_around_flag_ptr; /* read_madc will set in block mode */
/* variables used internally by read madc object but kept here for
convenience */
struct READ_MADC_REQUEST * next_active_block; /* ptr for active block list */
struct READ_MADC_REQUEST * previous_active_block; /* ptr for active block
list */
int read_madc_write_index;
int do_digitize_flag; /* used by read madc to tell if this request should
be digitized or skipped */
int block_mode_timer; /* decrement every interrupt to maintain block
mode timing via how fast adc turns around conversions */
} READ_MADC_REQUEST;
typecode 34 (22)H
read back the read madc fifo data
typedef struct
{
int fifo[SIZE_OF_ADC_FIFO];
int fifo_head;
int fifo_tail;
int fifo_count;
} READ_MADC_FIFO;
unsigned int out_counter; /* counts actual points written to ADC */
unsigned int in_counter; /* counts actual points received from ADC */
example
F19A2 with typecode 34 and SNM and XEQ
F6A4 (sizeof(READ_MADC_FIFO) + sizeof(int)*2)/2 times to return the data
typecode 35 (23)H
read back the dispatch fifo queue data
int dispatch_queue_fifo[NUMBER_RESOURCES];
int dispatch_queue_fifo_head;
int dispatch_queue_fifo_tail;
int dispatch_queue_fifo_count;
example
F19A2 with typecode 35 and SNM and XEQ
F6A4 (sizeof(int) * (3 + NUMBER_RESOURCES))/2 (NUMBER_OF_RESOURCES is
33) times to return the data
typecode 36 (24)H
read back the dispatch queue data
DISPATCH_QUEUE_ENTRY dispatch_queue[NUMBER_RESOURCES];
typedef struct
{
int (*callback_function_ptr)(void *parameter_ptr);
void * parameter_ptr;
int unprocessed_entry_flag;
} DISPATCH_QUEUE_ENTRY;
example
F19A2 with typecode 36 and SNM and XEQ
F6A4 sizeof(DISPATCH_QUEUE_ENTRY)*NUMBER_RESOURCES/2 times to return the data
typecode 37 (25)H
read back the alarm channel object data for the respective channel/list
typedef packed struct ALARM_CHANNEL_OBJECT
{
unsigned char list_number;
unsigned char channel_number;
unsigned char hi_flag;
unsigned char lo_flag;
unsigned char good_bad_flag;
unsigned char bypassed_bit;
short minimum_value;
short maximum_value;
unsigned char tries_needed;
unsigned char tries_now;
int current_state;
packed struct ALARM_CHANNEL_OBJECT * next;
} ALARM_CHANNEL_OBJECT;
example
F19A2 with typecode 37 and SNM
F19A3 with list number
F19A3 with channel number
F19A2 with typecode 37 and XEQ
F6A4 sizeof(ALARM_CHANNEL_OBJECT)/2 times to return the data
typecode 38 (26)H
read back the alarm fifo object data
typedef struct
{
ALARM_REPORT_OBJECT * head_of_fifo_ptr; /* remove from head */
ALARM_REPORT_OBJECT * tail_of_fifo_ptr; /* add to tail */
int number_of_reports_in_fifo;
} ALARM_FIFO_OBJECT;
example
F19A2 with typecode 38 and SNM and XEQ
F6A4 sizeof(ALARM_FIFO_OBJECT)/2 times to return the data
typecode 39 (27)H
not supported - read back the alarm fifo list
must be done manually using typecode 38 and typecode 4 to do a manual
walk of the respective list
typedef struct ALARM_REPORT_OBJECT
{
unsigned short int channel_number : 7;
unsigned short int filler_1 : 1;
unsigned short int list_number : 4;
unsigned short int lo_flag : 1;
unsigned short int hi_flag : 1;
unsigned short int filler_2 : 1;
unsigned short int good_bad_flag : 1;
struct ALARM_REPORT_OBJECT * next;
} ALARM_REPORT_OBJECT;
typecode 40 (28)H
read back the alarm list object data
typedef struct
{
int current_state;
int current_scan_index; /* scan one alarm block per time */
ALARM_CHANNEL_OBJECT ** alarm_list_blocks_ptr;
int start_channel;
int end_channel;
} ALARM_LIST_OBJECT;
example
F19A2 with typecode 40 and SNM and XEQ
F6A4 sizeof(ALARM_LIST_OBJECT)/2 times to return the data
typecode 41 (29)H
read back the alarm block pool manager
typedef struct
{
ALARM_CHANNEL_OBJECT * alarm_block_head;
int alarm_block_entries_used;
} ALARM_BLOCK_POOL_MANAGER;
example
F19A2 with typecode 41 and SNM and XEQ
F6A4 sizeof(ALARM_BLOCK_POOL_MANAGER)/2 times to return the data
typecode 42 (2A)H
read back the alarm report pool manager data
typedef struct
{
ALARM_REPORT_OBJECT * alarm_report_head;
int alarm_report_entries_used;
} ALARM_REPORT_POOL_MANAGER;
example
F19A2 with typecode 42 and SNM and XEQ
F6A4 sizeof(ALARM_REPORT_POOL_MANAGER)/2 times to return the data
typecode 43 (2B)H
read back setup/configuration of a particular plot channel.
typedef packed struct FOP_PLOT_DATA
{
unsigned short sample_period; /* in 10 usec units */
unsigned char madc_channel; /* madc channel being ploted */
unsigned char add_trigger_here; /* number of trigger events */
unsigned char add_arm_here; /* number of arm events */
unsigned char trigger_clock_events[16]; /* list of trigger events */
unsigned char arm_clock_events[16]; /* list of arm events */
} FOP_PLOT_DATA;
example
F19A2 with typecode 43 and SNM
F19A3 with plot number (For the purposes of this FOP plots are numbered 0 to 15.)
F19A2 with typecode 43 and XEQ
F6A4 4 times to return the data
typecode 44 (2C)H
read back setup/configuration of a particular list channel.
typedef packed struct FOP_LIST_DATA
{
unsigned char channel_range_start; /* starting madc channel to collect */
unsigned char channel_range_end; /* ending madc channel to collect */
unsigned char add_trigger_here; /* number of trigger events */
unsigned char add_arm_here; /* number of arm events */
unsigned char trigger_clock_events[16]; /* list of trigger events */
unsigned char arm_clock_events[16]; /* list of arm events */
} FOP_LIST_DATA;
example
F19A2 with typecode 44 and SNM
F19A3 with list number (For the purposes of this FOP lists are numbered 0 to 14.)
F19A2 with typecode 44 and XEQ
F6A4 3 times to return the data
MODULE HARDWARE DESCRIPTION
The CPU used on the C290 is the Intel 80960CF-33 a 32-Bit High Performance
Embedded Processor with On-Chip DMA Controller, Interrupt Controller,
High-Speed Bus Unit, On-Chip Register Cache, 4-Kbyte Instruction Cache,
and 1-Kbyte Data Cache.
Addressing on the board is broke down into regions using A31-A28 (0-F).
Region 0 32 bit
Static RAM
The C290 has 512K bytes of static RAM addressed from 0000 0000 to 0007 FFFF.
Region 1-3 32 bit
Not Used
Region 4 16 bit
Not Used
Region 5 16 bit
CAMAC interface
The CAMAC interface is used to process CAMAC commands sent to our processor,
(some commands sent to the module are intercepted by the hardware and never
reach the processor). The CAMAC interface base address is 5000 0000.
At location 5000 0000 is the CAMAC data port. The processor can read or
write data at this location. Reading or writing at this location has the
side effect of resetting the interrupt line.
Location 5000 0002 is the Lost Point Flip Flop. In D0 at this location is
a value which is set by the hardware and cleared by the processor via a
write to this location. The processor can read this value at any time via
a read. The LPFF is set by hardware when the hardware read flip flop is set
and it generates a CAMAC interrupt. This value is used by software in the
logic which determines whether a data point returned to CAMAC was lost and
consequently needs to be reissued.
Location 5000 0004 is the FA code data port. The processor can read the FA
code from this location. Writing to this location will reset the interrupt
line.
Location 5000 0006 is the LAM port and is write only. Data bit 0 is the
LAM bit for our crate and slot with 1 = LAM, 0 = no LAM. Data bit 1 is the
LAM enable bit for our crate slot with 1 = LAM enable, 0 = LAM disabled.
CAMAC commands result in the hardware sending the processor an interrupt
(XINT0).
Recommended usage for software:
The following are the ways the software can use the interface without
resulting in any problems from putting the hardware into states it does
not expect the software to put it in.
Standard read FA code (non DMA)
The cpu will receive an interrupt. The software will read out the FA code
from the READ FA CODE buffer and determine the request is in fact for a
read. The software must go and get the requested data and return it to
the CAMAC DATA buffer which will reset the interrupt. If for some reason
the software deems the request to be unserviceable, it will manually reset
the interrupt through the CLEAR INT port. The hardware will return no Q
and the next FA code will generate an interrupt, even if it is the same
FA code which caused the previous interrupt. If for some reason (F1A2) the
data is not readily available, yet the request is valid, the software must
mask the level sensitive CAMAC interrupt so the CPU is not continously
interrupted. The CAMAC port is effectively locked up during this time, so
it is required the front end execute no Q retries until the data is
returned and the interrupt is reset. The front end must always retry until
it receives the data it requested. The CPU assumes the data from the initial
interrupt will be returned. ie. the front end does not put in new FA code
just as the software is returning data to the CAMAC hardware, resulting in
the point being lost due to a change in FA code. Note: the sequence of
events described below makes the potential for lost data a moot point.
In order to increase response times of CAMAC non DMA reads, all CAMAC reads
will result in the hardware generating an extra interrupt with the identical
FA code. The software will then go and fetch the requested data in the usual
way. In fact, the software has no way to differentiate between the original
interrupt and the prefetch interrupt. Consequently, the hardware must always
generate both interrupts. When the hardware receives a different FA code,
it will generate an interrupt and the software can assume the last word of
data returned to the CAMAC interface was not returned to the front end. It
will take the steps required to insure the data word is not lost if the word
in fact needs to be retransmitted. Note: it has been determined the hardware
will not guarantee two interrupts per non DMA read code. Therefore the
following sequence of events has been agreed to: If a string of F1A2
commands is interrupted or not directly proceeded by an F16A0, the software
will clear the interrupt via the CLEAR INT port for each F1A2 which is
deemed invalid. This will result in the hardware returning no Qs indefinitely
until the front end tires of trying F1A2s. The software will be interrupted
once per function code and is responsible for deeming if any given F1A2
command is valid or not and clearing the interrupt line or returning data
accordingly.
DMA read FA code
The CPU will receive an interrupt. The software will read out the FA code
from the READ FA CODE buffer and determine the request is in fact for a DMA
read. The software must go and get the initial word and return it to the
CAMAC DATA buffer which will reset the interrupt. If for some reason the
data is not readily available, the software will manually clear the
interrupt via the CLEAR INT port. This will result in the hardware returning
a no Q. The software will be interrupted once per function code and is
responsible for determining when data or a no Q should be returned on an
interrupt by interrupt basis.
When the CAMAC hardware receives the 1st word, it will go into a special DMA
mode. Subsequent FA codes of the same type will not result in the CPU being
interrupted. Instead, the hardware will issue REQ requests directly to the
DMA. Each time the CPU returns data via the dma, it will generate another
REQ on the next identical FA code. This process continues until a different
FA code is received by CAMAC hardware. The hardware will not use the last
word returned by the CPU DMA and will issue an EOP followed by the normal
CAMAC interrupt. The software is responsible for keeping track of whether or
not a word was lost, and will back up internal pointers accordingly. The
front end must ask for and read out an even number of words. It is presently
assumed REQ and EOP commands from the hardware to the CPU DMA will be
harmless if the DMA is not in fact running. There currently is no
coordination between the hardware and the CPU in terms of when the DMA is
actually operating.
Please note: If the hardare has issued a DMA REQ and the processor has not
responded by writing a data point to the CAMAC buffer, the hardware will
reset the DMA REQ on the next identical FA code. The hardware will then
re-issue a CAMAC interrupt beginning the cycle again.
Write FA code
The CPU will receive an interrupt. The software will read out the FA code
from the READ FA CODE buffer and determine the request is in fact for a
write. The CPU will then read the CAMAC data out of the CAMAC DATA port.
This will have the effect of resetting the interrupt and indicating to the
hardware the write command has been processed.
Control FA code
The CPU will receive an interrupt. The software will read out the FA code
from the READ FA CODE buffer and determine the request is in fact for a
control function. The CPU will have to manually reset the interrupt via
the WRITE CLEAR INT port. This will indicate to the hardware the control
command has been processed.
Summary of arbitration provided by hardware.
The software assumes the hardware can handle the situation when the software
is currently executing the previous command (indicated by the software not
resetting the interrupt line) and any new FA code is received. The hardware
is responsible for issuing no Qs. From the software's point of view, it
simply executes CAMAC commands 1 at a time to completion and is responsible
for keeping track of lost data and stranded DMA's.
Region 6 16 bit
Channel timers - time stamp counter
Channel timers allow the processor to load a count value into any one of 16
individually controllable timers. A write into locations 6000 0000 to
6000 001F (because LSB is ignored) will load a counter value into the
respective counter. Counters will reload themselves and count down again
for as long as they are enabled. The count rate is currently set in
hardware to 100khz or 10us per tick.
Channel timers are enabled via a bit map at location 6000 0020. Bit 0
corresponds to timer 0 etc. A 1 will enable the respective timer, a 0 will
disable it.
Reading location 6000 0000 will return a bit map of which timers have timed
out since the last time the location was read. Reading location 6000 0000
has the side effect of resetting the interrupt line. Please note: the value
read in from this port must be saved by the processor, since reading it will
automatically clear the port.
The processor is interrupted when any of the timers have timed out (XINT2).
The time stamp counter can be read by the processor at any time from
location 6000 0020.
Region 7 16 bit
ADC interface
The ADC interface is used to send digitize commands to the ADC and to read
back the result when it is digitized. There is a 64 level deep FIFO at the
interface which allows the processor to write up to that many requests
without any being lost. The processor can not tell when the FIFO is full,
but can tell if there is a valid address in the FIFO or not via the AOR bit
of the ADC status port. The processor must keep track of how full the FIFO is.
Note: in order to address the above FIFO full problem, two more status bits
have been made available to the processor. The AFE (almost full or empty) bit
is in the ADC status port at bit 5. The HF (half full) bit is in the ADC
status port at bit 4.
The processor can tell when a digitize is completed via an interrupt on
XINT3 or by polling the AD busy bit of the ADC status port.
The processor can load a request for a digitize into the FIFO by writing to
the address range 7000 0000 to 7000 00FF. This will send the FIFO a digitize
request for the channel address desired (only bits A1 - A7 are used by
hardware, so the address written to is actually 2 * the ADC channel desired).
For example, 7000 0002 will request channel 1 to be digitized by the ADC.
The processor has two choices for reading digitized data back from the
processor; read the data back and simultaneously submit a new request for
the same channel to be digitized again, or read the data back without
resubmitting a digitize request.
A read from the address range 7000 0000 to 7000 00ff will return the data
most recently digitized by the ADC (can be from any channel, the address is
don't care as far as reading the data goes) and will submit a digitize
request for the channel address the same as described above for a write
(offset/2 = ADC channel requested)
A read from the address range 7000 0100 to 7000 01ff will return the data
most recently digitized by the ADC (once again can be from any channel, the
address is don't care as far as the reading of the data goes) and will NOT
submit another digitize request.
A read from anywhere in the ADC address space (7000 0000 to 7000 01FF) will
reset the interrupt line (XINT3).
A write to anywhere in the ADC address space (7000 0100 to 7000 01FF) will
reset the FIFO. It should be noted the hardware will reset the FIFO
whenever the system wide RESET line is active (low).
Region 8 8 bit
Not Used
Region 9 8 bit
ADC status port
This is a simple read only register in the processor's memory map at address
9000 0000. The bits are mapped as follows:
bit 0 tclk is active (0)
bit 1 remote (1) (ADC is currently in remote)
bit 2 AD busy (1) (ADC is currently digizing a request) *
bit 3 AOR (1) (FIFO currently has a valid address - not empty) *
bit 4 HF (1) (FIFO is half full or more)
bit 5 AFE (1) (FIFO is almost full or almost empty - half full tells which)
* gap between AOR indicating FIFO empty and AD busy line indicating AD is
busy is < 500ns
Region A 8 bit
LED interface
Reading location 0xA0000000 will reset the hardware watchdog timer. Writing
the location will set the front panel LEDs.
Region B 8 bit
TCLOCK interface
The TCLK interface consists of two principle parts, a FIFO which holds TCLK
events until they are read out by the processor, and a 256 X 1 ram which
holds the enable/disable status (mask) for each of 256 possible TCLK events.
The TCLK base address is B000 0000. The mask RAM is address B000 0000 to
B000 00FF. The enable/disable status bits appear as bit 0 to the processor.
The mask bits can be read or written by the processor. The mask bit for
each respective address is stored at an offset equal to the event number.
For example, event 2 is at offset 2. A 1 = enabled, 0 = disabled for the
mask.
The TCLK FIFO allows multiple events to be serviced by the processor at a
time. When at least 1 valid event has been processed by the hardware, the
event is stuffed into the FIFO and the processor is interrupted (XINT1).
The interrupt line will stay low (active) until the FIFO is completely
emptied. The FIFO is at location B000 0100. The processor empties the FIFO
by reading it. The data returned is the event number. A write to the FIFO
will reset the FIFO.
Region C 8 bit
Dual UART
Signetics SCN2681 Dual Universal Asynchronous Receiver/Transmitter
addressed from C000 0000 - C000 000F.
Region D 8 bit
FLEX load port
The FLEX chip , which currently contains the timers and time stamp
generator, must be loaded by the processor at power on reset from data
stored in FLASH. The FLEX load port is at location D000 0000 and is a
read/write port.
The algorithn to load the FLEX chip is as follows:
Read a byte from FLASH
Store it into FLEX
Poll the ready busy line (bit 1) until it is high
Check the status line (bit 2) (high is OK)
Check the configuration done line (bit 3) (high is load is done)
If load is not done, continue with the next byte.
Region E 8 bit
Novram
The novram is Xicor X20C16PI-55 explained in the data sheet. The following
implementation specific information is not in the data sheet. The NE line
is required to be high for normal access to the novram RAM section. When
it is low and the novram is otherwise selected, a restore operation is
performed by the novram. The NE line is the A11 line in the 290
implementation. Consequently, the following addressing is used;
0xE0000000 - 0xE0007FF will implement a restore operation,
0xE0000800 - 0xE0000FFF will result in a normal read or write operation.
Region F 8 bit
Flash memory
The C290 has 1M of Flash Memory loadable from a 8 bit Port on the front
of the module. Addressed from FFF0 0000 - FFFF FFFF.
I/O Connector Definition
The I/O connector used is the 36-pin Viking type.
Pin Signal Pin Signal
1L Gnd 1R Gnd
2L Local/Remote 2R Data Valid
3L NC 3R Busy
4L Data Bit 5 4R Data Bit 4
5L Data Bit 7 5R Data Bit 6
6L Data Bit 9 6R Data Bit 8
7L Data Bit 11 7R Data Bit 10
8L Data Bit 13 8R Data Bit 12
9L Data Bit 15 (MSB) 9R Data Bit 14
10L Digitize 10R Address 5
11L Address 6 11R Address 4
12L Address 7 12R Address 3
13L Data Bit 0 (LSB) 13R Address 2
14L Data Bit 1 14R Address 1
15L Data Bit 2 15R Address 0
16L Data Bit 3 16R NC
17L Xint5 17R Gnd
18L Tclk Input 18R Gnd
There are 16 data lines from the MADC. When using a 12-bit MADC connect
to data lines D4 through D15.
FUNCTION CODES SUMMARY
F0A1 - Read list data
F0A9 - Read plot data
F1A0 - Read LAM source
F1A1 - Read LAM Mask Register
F1A2 - Read Single Channel Data
F1A3 - Read Single Channel Time Stamp
F1A4 - Read List Setup Status
F1A5 - Read Plot Setup Status
F6A0 - Read Module ID
F6A1 - Read Firmware Version Number
F6A2 - Read Module Configuration/status
F6A3 - read status see FOP codes
F6A4 - read data see FOP codes
F6A5 - Read alarm messages
F6A6 - Read Plot Channel Status
F6A7 - Hardware Diagnostics Read
F6A8 - read status see FOP codes
F6A9 - read data see FOP codes
F8A0 - Test Module LAM
F9A0 - Reset Module
F16A0 - Select Channel For Read
F16A1 - Select List Channel Range
F16A2 - Write List Setup Number
F16A9 - Select Channel for Plot
F16A10 - Select a Plot Channel
F16A11 - Select Plot Buffer Size
F16A15 - Initialize Hardware Diagnostics Read
F17A1 and F17A9 - Select Arm And Trigger
F17A2 - Write List Sample Trigger
F17A1 and F17A9 - Select Arm And Trigger
F17A10 - Write Plot Sample Trigger
F18A1 - Select List Arm Delay
F18A2 - Write List Arm Clock Event
F18A9 - Select Plot Arm Delay
F18A10 - Write Plot Arm Clock Event
F19A0 - Write LAM Mask Register
F19A2 - Write command see FOP codes
19A3 - Write data see FOP codes
F19A5 - Select Plot For Read
F19A6 - Select List For Read
F19A7 - Write command see FOP codes
F19A8 - Write data see FOP codes
F19A9 - Write Plot Sample Period
F24A0 - Disable LAM
F24A1 - Reset Alarm System
F26A0 - Enable Module LAM
FOP TYPECODE SUMMARY
F19A2 or F19A7 - Write FOP Command
F19A3 or F19A8 - Write FOP Data
F6A3 or F6A8 - Read FOP Status Word
F6A4 or F6A9 - Read FOP Reply Data
typecode 1
the previously transmitted command data is returned for testing purposes
typecode 3
not supported
typecode 4
send a 32 bit pointer to 290 and a buffer length in words (2 bytes) for
a memory dump
typecode 5
not supported
typecode 6
write an alarm block to the 290 (see 290 specs for structure details)
typecode 7
read an alarm block from the 290 (see 290 specs for structure details)
typecode 9
clear the I've been reset bit
typecode 16 (10)H
read back the list data for the respective channel
typecode 17 (11)H
read back the plot data for the respective plot channel
typecode 18 (12)H
read back the mode channel data for the respective plot channel
typecode 19 (13)H
read back the list manager data
typecode 20 (14)H
read back the single point data
typecode 21 (15)H
read back the plot manager data
typecode 22 (16)H
read back the timing pool data
typecode 23 (17)H
read back the timers used table
typecode 24 (18)H
read back the timer trigger heads table
typecode 25 (19)H
not supported - read back the respective timer list
must be done manually using typecode 24 and typecode 4 to do a manual walk
of the respective list
typecode 26 (1A)H
read back the event triggers head table, events 0-127
typecode 27 (1B)H
read back the event triggers head table, events 128-255
typecode 28 (1C)H
not supported - read back the respective timer list
must be done manually using typecode 26-27 and typecode 4 to do a manual
walk of the respective list
typecode 29 (1D)H
read back the return data request
typecode 30 (1E)H
read back the DMA setup
typecode 31 (1F)H
read back the read madc request data for the respective resource number
typecode 32 (20)H
read back the ADC data
typecode 33 (21)H
not supported - read back the adc block list
must be done manually using typecode 32 and typecode 4 to do a manual
walk of the respective list
typecode 34 (22)H
read back the read MADC FIFO data
typecode 35 (23)H
read back the dispatch FIFO queue data
typecode 36 (24)H
read back the dispatch queue data
typecode 37 (25)H
read back the alarm channel object data for the respective channel/list
typecode 38 (26)H
read back the alarm FIFO object data
typecode 39 (27)H
not supported - read back the alarm FIFO list
must be done manually using typecode 38 and typecode 4 to do a manual
walk of the respective list
typecode 40 (28)H
read back the alarm list object data
typecode 41 (29)H
read back the alarm block pool manager
typecode 42 (2A)H
read back the alarm report pool manager data
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