CAMAC 477 Timer Module

                                  A. Franck

                              November 20, 1989

   General Description:

        The CAMAC 477 MODULE provides four timing channels.   Each  channel
   is  composed  of  a  32  bit counter which is normally clocked by a 1MHz
   signal derived from the Tevatron  clock.   Timing  cycles  are  normally
   triggered  by events encoded on the Tevatron clock.  Each channel may be
   programmed independently with respect to delay and clock events.

        The programmable channel delay may range from a minimum of 2usec to
   a  max of FFFF FFFFH microseconds (approx.  1.2 Hrs.).  These delays are
   based on the 10Mhz Tevatron clock.

        The clock events to be used as  triggers  are  selectable  and  may
   include any of the possible 256 events.  A maximum of fifteen events are
   allowed per channel.  A RAM is used on the module as the storage  medium
   for events.

        This module provides a synchronized loading capability known as Set
   On  Event  (SOE).   After  a valid low-high word pair are written to the
   delay counters, an SOE event may be written.  The occurrance of the  SOE
   event  will  then  cause  the setting to be loaded or, if the channel is
   busy counting, the pending bit to be  set.   The  pending  bit  will  be
   cleared  when  the  channel  goes to a non-busy state and the setting is
   loaded.  Between the time of the SOE event write and the  occurrance  of
   the SOE event an SOE waiting bit is set in the channel status word.  The
   SOE waiting and setting pending bits are both readable by means  of  the
   channel's status word.

        The SOE loading process is bypassed if events FF or FE are  written
   as  SOE  events.   In this case, an immediate load is executed, provided
   the channel is not busy.

        Two delay values may be read back per channel; a last written value
   and a running value.  The two values will be the same unless the setting
   pending or SOE waiting bit is set.  In  the  case  of  multiple  setting
   writes  during a pending or waiting state, the last setting written will
   be used.

        The four channels may be enabled or inhibited seperately  or  as  a
   group.  The channel's status word contains an enable/inhibit status bit.
   However,  with  the  exception  of  the  initial  enable  command,   the
   enable/inhibit commands are not normally used in this module.  Since the
   module will internally inhibit and enable  channels  for  new  settings,
   they  need  not  be  executed  by  the  front  end  (for purposes of new
   settings).  This decreases front end burden and  allows  the  externally
   written  inhibit  command to be used as a panic button to stop a channel
   even if it is busy.  If a loaded channel has been inhibited, it must  be
   enabled  and  have  an SOE event written to it.  It will then go through
   the normal loading sequence upon receipt  of  the  SOE  event.   If  the
   repeat  SOE mode bit is clear the load will occur only once.  However if
   it is set, a load will occur on each SOE event.

        Provisions are made for an external clock and  an  external  reset.
   These  are  to be used together as an alternative to the Tevatron Clock.
   If the external clock frequency is less than 10MHz, the delay time  must
   be  scaled  accordingly.   A jumper header is provided to allow selected
   channels to respond to the external reset signal.   Either  an  external
   reset or a Tevatron event may be used for a channel trigger but they may
   not be OR'ed.

        Module LAM is generated only upon absence of clock  signal,  either
   Tevatron  or  external.  LAM (clock) status is readable by means of each
   channel's status word.

        This module is provided with a battery backed RAM which allows  the
   return  of operation after a power down.  After power up, battery backed
   data is tested for validity and, if valid, is used to load counters, set
   event  triggers,  and  enable  channels as they were configured prior to
   power down.  SOE waiting and setting pending states are not preserved on
   power down.

        The four outputs each provide a positive 3 volt  1usec  pulse  upon
   timeout.   Each  has  a  series  output  diode to make possible external
   OR'ing of channels.  If external OR'ing is  necessary,  care  should  be
   taken  to  keep the output cables as short as possible because long runs
   can produce transmission line mismatch effects.



   OPCODES:

                Notes:  A(n)---- 0 >   F(0) A(n)* --- Read channel counter value -- low word,
                       running value

                 R16                                          R1
                -------------------------------------------------
                ! C15            Low Counter Value           C0 !
                -------------------------------------------------



   >>   F(1) A(n)* --- Read channel counter value -- high word,
                       running value

                 R16                                          R1
                -------------------------------------------------
                ! C31           High Counter Value          C16 !
                -------------------------------------------------

                The running values are values actually loaded
                into the counters.



   >>   F(2) A(n)* --- Read channel counter value -- low word,
                          last written value

                 R16                                          R1
                -------------------------------------------------
                ! C15            Low Counter Value           C0 !
                -------------------------------------------------



   >>   F(3) A(n)* --- Read channel counter value -- high word,
                       last written value

                 R16                                          R1
                -------------------------------------------------
                ! C31           High Counter Value          C16 !
                -------------------------------------------------

                The last written values may different from the
                running values if a setting is waiting for an SOE
                event or a setting is pending due to a busy condition.



   >>   F(4) A(n) --- Read events auto increment

                 R16                 R9  R8                   R1
                -------------------------------------------------
        word 1  !      Event  1         !     Event Count       !
                -------------------------------------------------
                MSB                 LSB   MSB                LSB
                -------------------------------------------------
        word 2  !      Event  3         !      Event  2         !
                -------------------------------------------------
          "                             "
          "                             "
          "                             "
          "                             "
                -------------------------------------------------
        word 8  !      Event  15        !      Event  14        !
                -------------------------------------------------

                This command will return two bytes per read. The pointer
        will be initialized by any opcode. Q will be delayed on the first
        read only. Thereafter, X and Q are returned immediately along with
        data.

                If more than fifteen events are written to a channel, they
        will not be stored. Also if reads beyond the event count are
        executed, the last byte read will be repeated.


   >>   F(5) A(0)* --- Read software version number

   >>   F(6) A(0)* --- Read module number

                 R16                                          R1
                -------------------------------------------------
                !                 01DDH (477D)                  !
                -------------------------------------------------


   >>   F(7) A(n)* --- Read channel status

                 R16                      R5  R4   R3   R2   R1
                -------------------------------------------------
                ! ------------0------------ ! S3 ! S2 ! S1 ! S0 !
                -------------------------------------------------

                        S0 -  = 1 if channel is enabled
                        S1 -  = 1 if clock present (LAM)
                        S2 -  = 1 if a setting is pending
                        S3 -  = 1 if a channel is waiting for
                                  an SOE event to load
                        S4 -  = 1 if an SOE has been written 
                                  to a channel
                     S5,S6 -  = 0 not used
                        S7 -  = 1 if repeat SOE mode is selected
                  S8 - S15 -  = last written SOE event  



   >>   F(9) A(0) --- Reset module

                - Performs reset as does Z*S2 and power up clear.

                - Does a RAM and Battery Backed Data validation. 

                - Inititializes all non-BBRAM and all counters to 00.

                - Re-establishes previous enable conditions, trigger
                  and SOE events, and counter settings. 

                This operation should be allowed 1 second to complete.



   >>   F(9) A(1) --- This is an F(9) A(0) reset with battery-backed
                      RAM initialization.

                 - Leaves all channels inhibited and all counter
                   values set to 0.



   >>   F(16) A(n) --- Write channel counter value - low word, normal mode

                 W16                                          W1
                -------------------------------------------------
                ! C15  --------- Low Counter Value --------- C0 !
                -------------------------------------------------
                MSB                                           LSB



   >>   F(17) A(n) --- Write channel counter value - high word, normal mode

                 W16                                          W1
                -------------------------------------------------
                ! C31  -------- High Counter Value -------- C16 !
                -------------------------------------------------

                The normal mode load is performed when the channel
                is not busy.    



        **Note: The module will accept any value from 0000 0000 to
                FFFF FFFFH as a counter value. 

                It should be noted that the minimum delay the module
                can produce is 2 microseconds. Therefore, writing
                0 or 1 as a delay will yeild a delay of 2 microseconds.



   >>   F(18) A(n) --- Write trigger event number and control byte

         W16                           W10   W9   W8                  W1
        ------------------------------------------------------------------
        ! -------- Not Used --------- ! N1 ! N0 ! E7 - Event Number - E0 ! 
        ------------------------------------------------------------------
                                       ---------  -----------------------
                                        Control        Event Number      

                        N0 -  = 0  add event
                              = 1  delete event
                        N1 -  = 1  delete all events
                   N2 - N7 -  = 0 Not used

                The event number may range from 00 to FF and once written
                to a specified channel, will trigger that channel upon
                receiving the event via the Tevatron clock. Fifteen events
                may be written. If greater than fifteen are written, the 
                excess will be ignored. Also repeat writing of an event
                will not result in duplicate entries.  



   >>   F(20) A(n) --- Write SOE event

                 W16                    W8                      W1
                ---------------------------------------------------
               ! C15 ! --- Not Used --- ! E7 -- Event Number -- E0 !
                ---------------------------------------------------

                Note: If event = FF or FE, the setting occurs immediately 
                      if the channel is not busy. If C15=1, the repeat
                      SOE mode is selected (load for each SOE event).


   >>   F(24) A(n) --- Inhibit selected channel

   >>   F(26) A(n) --- Enable Selected channel

   >>   F(28) A(0) --- Inhibit all channels

   >>   F(30) A(0) --- Enable all channels

                Note: - Inhibit / Enable status is read by
                        status read F(7) A(n).
                      - A channel will reload if inhibited and enabled.



                        CAMAC 477 MODULE OPCODE SUMMARY 
                       =================================



        F(0) A(n) -- Read channel counter value - low word, running 
                     value      

        F(1) A(n) -- Read channel counter value - high word, running
                     value

        F(2) A(n) -- Read channel counter value - low word, last written
                     value

        F(3) A(n) -- Read channel counter value - high word, last written
                     value

        F(4) A(n) -- Read event, auto increment

        F(5) A(0) -- Read software version number

        F(6) A(0) -- Read module number

        F(7) A(n) -- Read channel status


        F(9) A(0) -- Reset module, restore settings

        F(9) A(1) -- Reset module, including BBRAM, clear settings


        F(16) A(n) -- Write channel counter value - low word, normal mode

        F(17) A(n) -- Write channel counter value - high word, normal mode

        F(18) A(n) -- Write trigger event number and control byte

        F(20) A(n) -- Write channel SOE event


        F(24) A(n) -- Inhibit selected channel

        F(26) A(n) -- Enable selected channel

        F(28) A(0) -- Inhibit all channels

        F(30) A(0) -- Enable all channels



                                        0 =or< n 

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