TLG Front End Rules 4/8/2002

Frequency inputs to the TLG

1..15Hz: Commonwealth Edison 60Hz AC line Phase A in the Mac Room divided by 4.

Used for: 68040 Non-Maskable Interrupt (NMI)

IPA (Non-BSTR/Non-MI) reset output enable

2. 1MHz: Phase locked loop multiple of the Commonwealth Edison 60Hz AC line Phase A

Used for: External rate input to all the delay timers on the GPIP
MI Reset Delay to TLG T:RSTDL1 Z:RSTDL1
Clock event $08 Delay T:RSTDL3 Z:RSTDL3
Clock event $1A Delay T:RSTD1A Z:RSTD1A
Unused delay channel 4 T:RSTDL4 Z:RSTDL4
Unused delay channel 5 T:RSTDL5 Z:RSTDL5
Unused delay channel 6 T:RSTDL6 Z:RSTDL6

3. BMIN: BDOT zero crossing from GMPS

Used for: IPB (BSTR) reset output enable from

  1. 720Hz: Decoded TCLK $07 event
Used for: Interrupt used for execution of Front End code. Not yet implemented.

Supercycle definition

D33 Clockscope resolution has been changed since early this year from 15Hz ticks (67ms) to 1MHz timestamps (1 us). The TLG non-maskable interrupt is still 15Hz, so a TLG tick is still 67ms. Now, however, the events are timestamped with 1us resolution. Therefore, the BSTR resets can be seen to occur at roughly 49ms prior to the Non-BSTR resets. A TLG tick, then, begins epsilon after the Non-BSTR reset time (also known as $0F time, for the 15 Hz $0F event) and ends at the $0F. This being the case, BSTR resets on the very first TLG tick of a supercycle will normally have negative timestamps of 49ms magnitude.


Enabled on any TLG tick with a $12 (BSTR Prepulse), occurs 3ms after $0F and 12ms before $12.

BSTR resets

BSTR resets ($11, $12, $13, $14, $15, $16, $17, $19, $1C) must occur 2ms before BMIN.

BMIN occurs 20ms after $0F. So, T:RSTDLY is triggered by BMIN and delayed for 64.654ms, making BSTR resets "pop" at 18ms after $0F, which is 2ms before BMIN. Booster Beam (BB) resets are $13+$14+$15+$16+$17+$19+$1C. Null cycles are $11s. Pre-pulse cycles are $12s.

NTF Events ($1A and $1B)

The NTF Priority Request Signal comes from the NTF Interlock box and is active when the NTF patient treatment switch is on in the NTF control room. This signal is active low (0=true, 1=false) and is received by the BSSB "anded" with the BSSB NTF Key (gray) and passed on to the TLG as the NTFPRI signal.

The NTFP bit comes from D69 console application. It is active high (0=false,1=true). When a module is built, BB resets may be tagged with NTFP. In the Attributes Window on the Modules subpage, there are two lines that control this function.
NTFREQ Status Percentage Usage by NTF Action Taken
OFF 0% NTF does not take any cycles
ON 25% NTF takes 1 out of every 4 BB cycles 
ON 50% NTF takes 1 our of every 2 BB cycles
ON 75% NTF takes 3 our of every 4 BB cycles
ON 100% NTF takes all BB cycles



Defined as "NTF Beam Permit", this event actually turns the 58 degree magnet "on" meaning it deflects beam to NTF. The rules for generating $1A have two parts. If, after a BSTR Beam (BB) reset, there are 5 clock ticks ahead without a BSTR Beam reset, then $1A is issued. It will be made to occur at least 2ms , but less than 67ms, after the BSTR beam reset. Once a $1A has been issued, a 5 sec counter begins decrementing. If the counter terminates, a check is done to "look ahead" 5 clock ticks. If there is no BB reset within 5 clock ticks, then the $1A is issued.


Defined as "NTF Beam Inhibit", this event turns the 58 degree magnet "off", meaning it allows beam to travel undeflected past NTF and down LINAC. If allowed,$1B happens at least one tick prior to any BSTR beam reset. Two parameters determine whether $1B shall be inhibited. One is the NTFP bit from D69. The other is the NTF Priority Request signal from the BSSB which is active low (0=true, 1=false):
NTF Priority Request signal T:NTFPRI Z:NTFPRI


The truth table for inhibiting $1B is:
  NTFP=0 (false)  NTFP=1 (true)
NTFPRI=1 (false)  
NTFPRI=0 (true) Inhibit $1Bs


If the BSSB Master Key is off or any MSTR switches are taken (LED on) on the Beam Switch Boxes, then NTF has a Continuous NTF Beam Permit. This means the NTF 58 degree magnet stays on without regard to event $1B occurring (NTF gets DC Beam).

If the BSSB Master Key is on and the MSTR switches are all on (LED off) then the NTFP bit controls whether or not NTF takes BB reset cycles.

Note: NTF has a direct pulse shifter request connection which allows NTF to take beam on an $11 (BSTR Null) cycle. This is reflected on TCLK as event $09, "NTF Permitted Request". Therefore, NTF may be getting beam on $11s even if there are no BB reset cycles taken.

For TLG testing using TCLK, Linac must be notified to switch over to LCLK. Before switching to LCLK, make sure that a $1A was issued. LCLK does contain both $1A and $1B. So the NTF group should use a pulse generator set up to mimic $1As every 5 seconds into their NTF Interlock Module, while leaving the $1B input to the NTF interlock box unconnected.

MI Resets

MI resets ($20, $21,$23, $29,$2A, $2B,$2D, $2E) until this time occurred at $0F time. At the request of Phil Martin, the MI resets can now be delayed from $0F to occur closer to or farther ahead of the BSTR resets. This will depend on whether the value written is less than or greater than 18ms, respectively.

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