Names shown are for the test 165 in crate 90 slot 17.
All SSDNs have the same first 6 bytes, and a code in the seventh byte, to wit:
| 0 | 0 |
| 0 | OID = 1C (hex) |
| crate | slot |
| 0 | code |
The devices, codes, and properties supported this SSDN are as follows:
Code Name Description Properties Supported 1 S:SY165 misc. + Flat Top scale factor read, set, bstat, bctrl, digital alarm 2 S:SY165P F.P. scale factor read, set, bstat, bctrl 3 S:SY165S F.T. slope read, set, bstat, bctrl 4 S:SY165Q F.P. slope read, set, bstat, bctrl 5 S:SY165R Ramp memory read, set 6 S:SY165F Reference read, set, bstat, bctrl
In fact the 'reading' property is always identical to 'reading-the-setting' and is somewhat superfluous. The convention is to use the actual MADC channel for the 'reading' property of both scale factor devices. This means you can see what the supply is actually doing as you are control it. The two slope devices conventionally get a 'reading' property identical to the 'reading-the-setting' property because there is no good way to read back the actual slope.
The ramp memory device never appears on a parameter page.
The scaling for the basic control PDB for the first two devices, the flat top and front porch scale factors, control the power supply itself thusly:
Scaled Value Function Camac Command 1 OFF F(24)A(1) 2 ON F(26)A(1) 3 RESET F(26)A(7) 4 POL+ F(26)A(3) 5 POL- F(24)A(3) 6 ZERO F(16)A(1), data = 0
The ZERO function is used to zero the DAC output. This turns out to be useful during certain mass restore operations.
The scaling for the basic control PDB for the second two devices, the slope factors, control the 165 card thusly:
Scaled Value Function Camac Command 1 OFF F(24)A(2) disable ramp 2 ON F(26)A(2) enable ramp 3 RESET F(9)A(0) reset 165 card itself 4 POL+ F(26)A(4) enable energy scaling 5 POL- F(24)A(4) disable energy scaling 6 ZERO F(16)A(1) data = 0
The first four devices, all except the ramp memory, return the status resulting from an F(0)A(0) function. This gives the complete power supply status.
These are entered into the data base with default lengths of 2 bytes. This enables the parameter page to knob and display only the first datum: the flat top scale factor.
The total length of this device is 22 bytes (11 words) to allow Klamp's page to have control over all the internal goodies. This 11 word buffer has packed into it most of the 165 card's miscellaneous operating parameters.
The PDB is set up to scale only the first 2 bytes as if it were a normal power supply, so that you can operate the scale factors from the parameter page.
The reading and setting buffers are identical. They look like this:
+-----------------------+ +0 | F.T. scale factor | Read: F(1)A(1) Set: F(17)A(1) +-----------------------+ +2 | Ramp number executing | Read: F(1)A(5) Set: F(16)A(5) +-----------------------+ +4 | S.F. Switch time | Read: F(1)A(6) Set: F(17)A(6) +-----------------------+ +6 | Firmware version no. | Read: F(6)A(1) Set: ignored +-----------------------+ +8 - 20 | Clock | Read: F(17)A(14) followed by ~ Event ~ seven F(0)A(14) commands. | Assignments | Set: Appropriate F(16)A(6) +-----------------------+
The clock event assignments are written positionally. The first one in the buffer is written to the 165 card with a 1 in the upper byte, assigning the first clock event in the buffer to slot 1 on the card.
Using the 'length' and 'offset' parameters on the DPREQ call it is possible to read or write any slice out of this buffer.
All are two bytes long and should be scaled for parameter page use.
SY165P Front Porch Scaling Read: F(1)A(2) Set: F(17)A(2) SY165S Flat Top Slope Read: F(1)A(3) Set: F(17)A(3) SY165Q Front Porch Slope Read: F(1)A(4) Set: F(17)A(4)
There are 10 (I believe) ramp memories of 256 bytes each. The reading and setting buffers for this device are 2560 bytes long, containing the 10 waveforms strung out one after the other.
You read or write selected ramps by specifying the length and offset parameters to DPM. For instance, if you want to read the entire third ramp you specify length = 256 bytes and offset = 512 bytes. The first half of the first ramp can be specified by length = 128 bytes and offset = 0 bytes.
The offset is written directly to the card with an F(16)A(7). The data are transferred with F(16)A(0) or F(1)A(0) commands.
The reading and setting values are 16-bit signed integers. The setting directly controls the DAC by sending an F(16)A(1). The Reading property should actually refer to the MADC reading the power supply (this needs to be done via databse entries.)
The digital alarm property MAY be attached to any one of the above devices. The practice is to attach it to the code 1 (flat top scale factor and miscellaneous parameters) device. The SSDN for the digital alarm property is identical to the SSDN described above. The 'code' byte is actually ignored by the front end.
In order to understand how the digital alarm property works it is helpful to refer to the following diagram:
High order word Low order word
+-----------------------+-----------------------+
| LAM SOURCE REGISTER | P.S. STATUS REGISTER |
+-----------------------+-----------------------+
READ DATA F(0)A(6) F(0)A(0)
READ NOMINAL ALWAYS ZERO F(0)A(2)
WRITE NOMINAL N/A F(16)A(2)
READ MASK F(0)A(4) F(0)A(3)
WRITE MASK F(16)A(4) F(16)A(3)
ALARM STATUS F(0)A(6) F(0)A(5)
The basic model is that the card alarms on a 2 word quantity: the low order word is the power supply status and the high order word is an on-card "Lam source register." Alarm checking is actually done by hardware on the card. The two words are checked in a somewhat different manner. The arrangement depicted above, where we visualize a 32 bit digital quantity, is a software fiction.
Another way of looking at this is to picture the nominal and mask fields within the digital alarm property. You have to specify in your database entry that these are each 2 words long as follows:
+-----------------------+
NOM + 0 | P.S. STATUS NOMINAL | READ: F(0)A(2) SET: F(16)A(2)
+-----------------------+
+ 2 | LAM SOURCE NOMINAL | ALWAYS ZERO
+-----------------------+
+-----------------------+
MASK + 0 | P.S. STATUS MASK | READ: F(0)A(3) SET: F(16)A(3)
+-----------------------+
+ 2 | LAM SOURCE MASK | READ: F(0)A(4) SET: F(16)A(4)
+-----------------------+
The low order word, corresponding to the power supply status, works in the conventional fashion. The status is compared to the nominal and the result is 'anded' with the mask. If any bits are bad (after masking) then alarm is raised. It is possible to read a 'which bits are bad' word from the card so a meaningful alarm can be posted. This is all very ordinary.
The the high order word, the Lam source register, is a curious beast. The first thing to know is that the nominal is always zero. This is a hardware restriction. The hardware is built so that if any of these bits becomes '1' then the module generates Lam (an alarm). The front end, as part of the software fiction, thus always forces the nominal to be zeroes.
The bit positions in the Lam source register are assigned by the people who built the card. These bits are available from the module writeup. For some cards built to date these are as follows:
Bit Meaning Which Cards 15 Illegal Camac write value 164, 165, 265 14 Attempt to modify active ramp 165 13 Missing MDAT (updated at 1 Hz) 165, 265 12 Missing TCLK (updated at 1 Hz) 165, 265 0 Status error 164, 165, 265
Remember that all these bit positions refer to the high order word, so that the "Illegal Camac write value" bit is really bit 2**31 of the two-word-long mask.
In general all these have been masked off except the "status error" bit. The "status error" bit effectively controls whether the power supply alarm checking is working or not. The front end will always force a '1' into this bit. Even if you try to mask everything off you will see that the front end patches the mask word to '00010000' (hex).
The front end implements the alarm bypass function by enabling and disabling Lam on the card.
The EMC for the digital alarm property is extremely simple:
| 2 | logical node |
| slot | crate |
| 0 | 0 |
| 0 | 0 |