							27 Jan 93 (rev)


	     Support for the 184 Digital I/O Card.
	     ------- --- --- --- ------- --- ----


     The 184 card has a single word of digital output and a single word
of digital input.  The output register can be both read and written; the
input register is read-only.  The 184 also has two pulsed output bits.


SSDN
----

     The front end recognizes five data base properties: Reading,
Setting, Basic Status, Basic Control, and Digital Alarm.  Analog Alarm
can be added later if it is needed.  All properties have the same SSDN:


		+---------------------------------+
		|               mask              |
		+---------------------------------+
		|        0       | OID = 45 (hex) |
		+---------------------------------+
		|     crate      |     slot       |
		+---------------------------------+
		|     45 (hex)   |   flag bits    |
		+---------------------------------+


     Flag bits are defined as follows.  We describe them further below.

	Bit 2**0    1 = right shift data until it is right-adjusted
			before returning it to the console.
	Bit 2**1    1 = increment data before returning it.
	Bit 2**2    1 = console needs 'software decoder' (1 bit out
			of many)
	Bit 2**3    1 = hardware device needs 'software decoder'.
	Bit 2**4    1 = read back the OUTPUT register (F(0) Camac
			command) instead of the default INPUT register
			(F(2) command).
	Bit 2**5    1 = data is signed (used for shifted data).


READING DATA
------------

     Reading and Basic Status properties read, by default, the input
register, the F(2) Camac command. The choice is up to the user; the
front end will respond in the same way to a read request for either of
the two properties.  The length of the reading and status properties is
ordinarily exactly one word.  The front end will object if you request
less than a word.  If you request more, then only the low order word of
the response is meaningful. 

     It is possible to direct the Reading and Basic Status properties
to read back the F(0) output register instead.  There is a special flag
for this option.

     When you read the Setting property you get, by default, the F(0)
output register. In all other respects reading the Setting is identical
to reading the other properties. 

     Read operations work as follows.  The front end reads the digital
input word from the 184 card (with an F(2) or F(0) command).  This word
is 'anded' with the mask.  It is then optionally right-shifted if the
'shift' bit is on.

     Some examples are:

        Mask   Shift flag

        FFFF       0        Just return the whole word unchanged
        FF00       0        Take the high order byte if the reading
                              and return it in the TOP of the result
                              word, with zeroes in the low order
                              byte.
        FF00       1        Take the high order byte of the reading
                              and return it in the BOTTOM of the
	                      result, as a number from 0 to 255.
        0008       0        Return only bit 2**3 as a '0' or an '8'.
                              The other bits are zeroed.
        0008       1        Return only bit 2**3, right adjusted,
                              as a '0' or a '1'.
        000C       1        Return only bits 2**2 and 2**3, right
                              adjusted, as a number from 0 to 3.


     After the above operations are performed the result can be
optionally mashed by the other flags. 

     The 'increment' flag merely adds 1 to the result.  As an example:
if the mask is 1F, and the increment bit is on, the console will receive
a number between 1 and 32

     The 'software decoder' bits simulate the a 'one bit out of many'
function.  The two bits define which side of the world, the console or
the 184 card, is expecting the 'one bit out of many' form and which is
expecting to see a simple binary number.  The low order bit is taken to
be bit 0. 

     If the masked and shifted reading is a number from 0-3, and the
'console needs software decoder' bit is on, then the console will
receive the values (in binary) 0001, 0010, 0100, 1000.  The 'hardware
needs software decoder' bit works in reverse: the status register is in
one bit out of many form, but the console receives a small integer. 


WRITING DATA AND CONTROL
------- ---- --- -------

     The output register (F(16) and F(17) commands) is written by either
the Setting or Basic Control properties, which are also identical. The
pulsed bits are also controlled by these two properties.  The length of
the setting and control properties can be either one or two words.  If
it is two words, the high order word contains encoded instructions to
the front end described below. 

     There are four ways of writing data to this card:

	"Masked write"	-- writes many bits simulatneously
			into the digital output register.

	"Single bit"	-- writes an individual bit in the
			output register.

	"Pulsed bit"	-- fires one of the two pulsed outputs.

	"Edge triggered" -- toggles an individual bit in the
			output register

     If the data that you transmit for your Setting or Basic control
operation is only one word long, then you automatically get the masked
write option.  If the data is two words, then the upper two bits of
the high order word contain a code:	

	00 = Masked write (whole high order setting word is '0000'x)
	01 = Single bit   (whole high order setting word is '400n'x)
	10 = Pulsed bit   (whole high order setting word is '800n'x)
	11 = Edge trig.   (whole high order setting word is 'C00n'x)


     Masked Write
     ------ -----

     If the data is only one word long, or if it is two words long and
the upper word is zero, then a write operation is the exact inverse of a
read operation.  You are writing many bits into the output register
simultaneously.  The mask field in the SSDN specifies which bits you are
writing.

     The optional flag bits, such as shifting and decoding, also apply, 
although they will now work in the OPPOSITE direction.  The same
examples as above:

        Mask   Shift flag

        FFFF       0        Just write the whole word unchanged
        FF00       0        Take the high order byte if the setting
                              and write it into  the TOP of the output
                              reg.  The low order byte of the output
			      reg remains unchanged.
        FF00       1        Take the LOW order byte of the reading
                              and write it into the HIGH order byte 
			      output reg.
        0008       0        Write only bit 2**3, copied from your
			      setting data into the output reg.
        0008       1        Write the LOW ORDER BIT of your setting
			      data into bit 2**3 of the output reg.
        000C       1        Write the two low order bits of your 
			      setting into only bits 2**2 and 2**3
			      of the output register.

     Single Bit
     ------ ---

     If the setting data is two words long, and the upper two bits of
the high order word are 01 (binary), then you will write into a single
bit of the output register.  The format of the high order word is as 
follows: 

	01xx/xxxx/xxxx/BBBB

	BBBB = Bit number, 0-15.  Bit 0 is the low order bit.

     The low order bit (of the low order word) of the setting data
contains the new value.  Thus we have:

	Setting data (hex)	Bit affected

	40080001		2**8  = 1
	40000001		2**0  = 1
	400C0000		2**12 = 0
	40000000		2**0  = 0


     Pulsed Bit
     ------ ---

     If the setting data is two words long, and the upper two bits of
the high order word are 10 (binary), then you will strobe one or both
of the pulsed output lines.  The format of the high order word is as 
follows: 

	10xx/xxxx/xxxx/xxNN

	N = bit number.   00 = pulse bit P0
			  01 = pulse bit P1
			  11 = pulse both P0 and P1

 
     Edge Triggered
     ---- ---------

     This mode provides for single-bit edge triggered operation.  The
front end writes the bit TWICE:

	1) First set the bit to the OPPOSITE of the requested state
	2) Then set the bit to the requested state.

     This will force at least one transition of the output bit.  There
is a one second pause between the two operations.

     The setting data must be two words long, and the upper two bits of
the high order word are 11 (binary).  The format of the high order word
is as follows: 

	11xx/xxxx/xxxx/BBBB

	BBBB = Bit number, 0-15.  Bit 0 is the low order bit.

     The low order bit (of the low order word) of the setting data
contains the FINAL state of the new value.  Thus we have:

	Setting data (hex)	Bit affected

	C0080001		2**8  = 0 - 1 (rising) edge
	C0000001		2**0  = 0 - 1 (rising) edge
	C00C0000		2**12 = 1 - 0 (falling) edge
	C0000000		2**0  = 1 - 0 (falling) edge


EMC
---

     The EMC is a direct copy of the SSDN, including the mask and
flag bits.  


WORKED OUT EXAMPLE
------ --- -------

     We have an imaginary "Paddle Wheel" device which can be rotated to
put one of 8 arms into the path of beam.

     We want to type in and display the paddle number on the parameter
page.  This is a number from 1 to 8.  We also want to be able to attach
a text description to each paddle and display one paddle per line on the
digital status page.  We want to turn its power supply on and off.
Finally we want to be able to reset the paddle wheel controller from
the parameter page.

     The paddle wheel controller accepts a binary number from 0 to 7,
corresponding to paddles 1 to 8 respectively.  It also reports back a
status byte with one bit per paddle.  Paddle 1 is in the low order bit.
It also has a pulsed reset line.

     This device is mapped wired up to the 184 card as follows: the
three control bits are bits 2**0-2**2 (low order 3 bits) of the control
word, the current paddle readback is in the upper byte of the digital
input word, the p.s. on/off control bit is 2**3, and the reset is
attached to pulsed line P1.

     We will the consider the SSDN for each property in turn.

     Setting Property.  We will be setting (and reading-the-setting)
only the low order three bits of the control word.  The mask word in
the SSDN is therefore 7.  This is unshifted, so the shift flag is 0.
We want the console to use numbers from 1 to 8, while the hardware
uses number from 0 to 7, so the increment flag is on.  Note that the
increment flag works both ways: it increments when we read-the-setting
but decrements when we write a new setting, so the two world views
are correctly matched.

     Basic Status Property.  We want to display the status byte, which
has one bit per paddle, on the status page.  We can extract this status
byte from the digital input word by specifying a mask of FF00 (hex) and
turning the shift flag on.  This will read the high order byte of the
input word and right adjust it.  The extended text property will contain
one description per bit.

     Basic Control Property.  In the Basic Control PDB we specify:

	RESET word = '80010000' (hex).  This specifies that we pulse
		bit P1 and ignore the other control bits.  For this
		purpose the SSDN mask and flags are totally ignored.

	OFF word = '40030000' (hex).  This specifies that we write 0
		into the single bit 2**3.  No other bits are affected.
		The SSDN mask must be at least '8'x, to enable us to
		use this bit.

	ON word  = 'C0030001' (hex).  This specifies that we write a
		0 to 1 edge into the single bit 2**3.  No other bits
		are affected.

     Reading Property.  It would be nice to display the current readback
on the parameter page next to the current setting.  However the current
setting is a number from 1 to 8, while the status readback is a 'one bit
out of many' arrangement.  In the SSDN we specify a mask of FF00 (hex)
to extract the status byte, and turn the shift flag on to right adjust
it.  Then we set the 'hardware needs software decoder' bit.  This
signifies that on the hardware side we have one bit out of eight, but on
the software side we are using binary numbers from 0 to 7.  Note that
the front end will run the 'software decoder' in reverse to encode the
number.  Finally we set the increment bit in the SSDN so that the
result will be a number from 1 to 8.
